From: Lynne <dev@lynne.ee>
To: FFmpeg development discussions and patches <ffmpeg-devel@ffmpeg.org>
Subject: Re: [FFmpeg-devel] [PATCH 1/3] riscv: add CPU flags for the RISC-V Vector extension
Date: Sat, 3 Sep 2022 21:20:20 +0200 (CEST)
Message-ID: <NB3mzYO--3-2@lynne.ee> (raw)
In-Reply-To: <20220903190147.196927-1-remi@remlab.net>
Sep 3, 2022, 21:01 by remi@remlab.net:
> From: Rémi Denis-Courmont <remi@remlab.net>
>
> RVV defines a total of 12 different extensions: V, Zvl32b, Zvl64b,
> Zvl128b, Zvl256b, Zvl512b, Zvl1024b, Zve32x, Zve32f, Zve64x, Zve64f and
> Zve64d.
>
> At this stage, we don't care about the vector length extensions Zvl*,
> as most or all optimisations will be running in a loop that is
> independent on the data set size.
>
I need to know the maximum length to write an FFT.
Could you add flags for it? I don't mind a 5-bit bitfield for a log2 of it,
or one flag per length (up to 65536).
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next prev parent reply other threads:[~2022-09-03 19:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-03 19:01 [FFmpeg-devel] [PATCHv1 0/3] Float DSP for RISC-V Vector extension - part I Rémi Denis-Courmont
2022-09-03 19:01 ` [FFmpeg-devel] [PATCH 1/3] riscv: add CPU flags for the RISC-V Vector extension remi
2022-09-03 19:05 ` Rémi Denis-Courmont
2022-09-03 19:20 ` Lynne [this message]
2022-09-03 19:59 ` Rémi Denis-Courmont
2022-09-03 21:38 ` Lynne
2022-09-04 5:41 ` Rémi Denis-Courmont
2022-09-04 6:39 ` Lynne
2022-09-04 8:27 ` Rémi Denis-Courmont
2022-09-03 19:01 ` [FFmpeg-devel] [PATCH 2/3] riscv: initial common header for assembler macros remi
2022-09-03 19:01 ` [FFmpeg-devel] [PATCH 3/3] riscv: add float vector-scalar multiplication remi
2022-09-03 19:11 ` Lynne
2022-09-03 19:34 ` Rémi Denis-Courmont
2022-09-03 19:48 ` Lynne
2022-09-03 20:01 ` Rémi Denis-Courmont
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