* [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl
@ 2022-03-11 7:52 jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: jianhua.wu-at-intel.com @ 2022-03-11 7:52 UTC (permalink / raw)
To: ffmpeg-devel; +Cc: Wu Jianhua
From: Wu Jianhua <jianhua.wu@intel.com>
This commit uses the instruction `vpdpbusd` introduced by AVX512 VNNI
to calculate the horizontal filter.
ff_hevc_put_hevc_qpel_h8_8_sse4 1039169
ff_hevc_put_hevc_qpel_h8_8_avx512icl 677153
ff_hevc_put_hevc_qpel_hv8_8_sse4 3603511
ff_hevc_put_hevc_qpel_hv8_8_avx512icl 2995354
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 137 ++++++++++++++++++++++++++++++++++
libavcodec/x86/hevcdsp.h | 3 +
libavcodec/x86/hevcdsp_init.c | 4 +
3 files changed, 144 insertions(+)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index ff6ed0711a..52fa3ec948 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -87,6 +87,26 @@ QPEL_TABLE 12, 4, w, sse4
QPEL_TABLE 8,16, b, avx2
QPEL_TABLE 10, 8, w, avx2
+QPEL_TABLE 8, 1, b, avx512icl_h
+QPEL_TABLE 8, 1, d, avx512icl_v
+
+pb_qpel_shuffle_index: db 0, 1, 2, 3
+ db 1, 2, 3, 4
+ db 2, 3, 4, 5
+ db 3, 4, 5, 6
+ db 4, 5, 6, 7
+ db 5, 6, 7, 8
+ db 6, 7, 8, 9
+ db 7, 8, 9, 10
+ db 4, 5, 6, 7
+ db 5, 6, 7, 8
+ db 6, 7, 8, 9
+ db 7, 8, 9, 10
+ db 8, 9, 10, 11
+ db 9, 10, 11, 12
+ db 10, 11, 12, 13
+ db 11, 12, 13, 14
+
SECTION .text
%define MAX_PB_SIZE 64
@@ -1670,3 +1690,120 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
%endif ;AVX2
%endif ; ARCH_X86_64
+
+%macro QPEL_FILTER_H 5
+%define %%table hevc_qpel_filters_avx512icl_h_%1
+%assign %%offset 4
+ dec %2q
+ shl %2q, 3
+%ifdef PIC
+ lea %5q, [%%table]
+ %define FILTER %5q
+%else
+ %define FILTER %%table
+%endif
+ vpbroadcastd m%3, [FILTER + %2q + 0*%%offset]
+ vpbroadcastd m%4, [FILTER + %2q + 1*%%offset]
+%endmacro
+
+%macro QPEL_FILTER_V 5
+ vpbroadcastd m%3, [%5 + %2q + 4*%4]
+%endmacro
+
+%macro QPEL_LOAD_SHUF 2
+ movu m%1, [pb_qpel_shuffle_index + 0]
+ movu m%2, [pb_qpel_shuffle_index + 32]
+%endmacro
+
+; required: m0-m5
+; %1: dst register index
+; %2: name for src
+%macro QPEL_H_LOAD_COMPUTE 2
+ pxor m%1, m%1
+ movu xm4, [%2q - 3]
+ vpermb m5, m2, m4
+ vpermb m4, m3, m4
+ vpdpbusd m%1, m5, m0
+ vpdpbusd m%1, m4, m1
+%endmacro
+
+%macro HEVC_PUT_HEVC_QPEL_AVX512ICL 2
+cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
+ QPEL_FILTER_H %1, mx, 0, 1, tmp
+ QPEL_LOAD_SHUF 2, 3
+.loop:
+ QPEL_H_LOAD_COMPUTE 6, src
+ vpmovdw [dstq], m6
+ LOOP_END dst, src, srcstride
+ RET
+%endmacro
+
+%macro HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 2
+cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 7, 27, dst, src, srcstride, height, mx, my, tmp
+%assign %%shift 6
+%assign %%extra 7
+ QPEL_FILTER_H %1, mx, 0, 1, tmp
+ QPEL_LOAD_SHUF 2, 3
+ lea tmpq, [srcstrideq*3]
+ sub srcq, tmpq
+ sub myq, 1
+ shl myq, 5
+%ifdef PIC
+%define %%table hevc_qpel_filters_avx512icl_v_%1
+ lea tmpq, [%%table]
+ %define FILTER tmpq
+%else
+ %define FILTER %%table
+%endif
+%assign %%i 6
+%assign %%j 0
+%rep %1
+ QPEL_FILTER_V %1, my, %%i, %%j, FILTER
+ %assign %%i %%i+1
+ %assign %%j %%j+1
+%endrep
+%rep %%extra
+ QPEL_H_LOAD_COMPUTE %%i, src
+ add srcq, srcstrideq
+%assign %%i %%i+1
+%endrep
+.loop:
+ QPEL_H_LOAD_COMPUTE %%i, src
+ vpmulld m22, m14, m6
+ vpmulld m23, m15, m7
+ vpmulld m24, m16, m8
+ vpmulld m25, m17, m9
+ vpaddd m26, m22, m23
+ vpaddd m24, m25
+ vpaddd m26, m24
+ vpmulld m22, m18, m10
+ vpmulld m23, m19, m11
+ vpmulld m24, m20, m12
+ vpmulld m25, m21, m13
+ vpaddd m22, m22, m23
+ vpaddd m24, m25
+ vpaddd m26, m24
+ vpaddd m22, m26
+ mova m14, m15
+ mova m15, m16
+ mova m16, m17
+ mova m17, m18
+ mova m18, m19
+ mova m19, m20
+ mova m20, m21
+ vpsrad m22, %%shift
+ vpmovdw [dstq], m22
+ LOOP_END dst, src, srcstride
+
+ RET
+%endmacro
+
+%if ARCH_X86_64
+%if HAVE_AVX512ICL_EXTERNAL
+
+INIT_YMM avx512icl
+HEVC_PUT_HEVC_QPEL_AVX512ICL 8, 8
+HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
+
+%endif
+%endif
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 67be0a9059..5a495d2563 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -233,6 +233,9 @@ WEIGHTING_PROTOTYPES(8, sse4);
WEIGHTING_PROTOTYPES(10, sse4);
WEIGHTING_PROTOTYPES(12, sse4);
+void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+
///////////////////////////////////////////////////////////////////////////////
// TRANSFORM_ADD
///////////////////////////////////////////////////////////////////////////////
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index 8a3fa2744b..e51375ebc2 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -878,6 +878,10 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->add_residual[3] = ff_hevc_add_residual_32_8_avx2;
}
+ if (EXTERNAL_AVX512ICL(cpu_flags) && ARCH_X86_64) {
+ c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
+ c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
+ }
} else if (bit_depth == 10) {
if (EXTERNAL_MMXEXT(cpu_flags)) {
c->add_residual[0] = ff_hevc_add_residual_4_10_mmxext;
--
2.17.1
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https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
@ 2022-03-11 7:52 ` jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl jianhua.wu-at-intel.com
` (2 subsequent siblings)
3 siblings, 0 replies; 10+ messages in thread
From: jianhua.wu-at-intel.com @ 2022-03-11 7:52 UTC (permalink / raw)
To: ffmpeg-devel; +Cc: Wu Jianhua
From: Wu Jianhua <jianhua.wu@intel.com>
ff_hevc_put_hevc_qpel_h16_8_sse4 3290870
ff_hevc_put_hevc_qpel_h16_8_avx512icl 1730033
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 26 +++++++++++++++++++++++++-
libavcodec/x86/hevcdsp.h | 1 +
libavcodec/x86/hevcdsp_init.c | 1 +
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index 52fa3ec948..4e39cdd7fe 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -89,6 +89,7 @@ QPEL_TABLE 10, 8, w, avx2
QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v
+QPEL_TABLE 16, 1, b, avx512icl_h
pb_qpel_shuffle_index: db 0, 1, 2, 3
db 1, 2, 3, 4
@@ -98,6 +99,14 @@ pb_qpel_shuffle_index: db 0, 1, 2, 3
db 5, 6, 7, 8
db 6, 7, 8, 9
db 7, 8, 9, 10
+ db 8, 9, 10, 11
+ db 9, 10, 11, 12
+ db 10, 11, 12, 13
+ db 11, 12, 13, 14
+ db 12, 13, 14, 15
+ db 13, 14, 15, 16
+ db 14, 15, 16, 17
+ db 15, 16, 17, 18
db 4, 5, 6, 7
db 5, 6, 7, 8
db 6, 7, 8, 9
@@ -106,6 +115,14 @@ pb_qpel_shuffle_index: db 0, 1, 2, 3
db 9, 10, 11, 12
db 10, 11, 12, 13
db 11, 12, 13, 14
+ db 12, 13, 14, 15
+ db 13, 14, 15, 16
+ db 14, 15, 16, 17
+ db 15, 16, 17, 18
+ db 16, 17, 18, 19
+ db 17, 18, 19, 20
+ db 18, 19, 20, 21
+ db 19, 20, 21, 22
SECTION .text
@@ -1712,7 +1729,7 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
%macro QPEL_LOAD_SHUF 2
movu m%1, [pb_qpel_shuffle_index + 0]
- movu m%2, [pb_qpel_shuffle_index + 32]
+ movu m%2, [pb_qpel_shuffle_index + 64]
%endmacro
; required: m0-m5
@@ -1720,7 +1737,11 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
; %2: name for src
%macro QPEL_H_LOAD_COMPUTE 2
pxor m%1, m%1
+%if mmsize == 64
+ movu ym4, [%2q - 3]
+%else
movu xm4, [%2q - 3]
+%endif
vpermb m5, m2, m4
vpermb m4, m3, m4
vpdpbusd m%1, m5, m0
@@ -1805,5 +1826,8 @@ INIT_YMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 8, 8
HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
+INIT_ZMM avx512icl
+HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
+
%endif
%endif
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 5a495d2563..6e3fc01ad0 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -234,6 +234,7 @@ WEIGHTING_PROTOTYPES(10, sse4);
WEIGHTING_PROTOTYPES(12, sse4);
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
///////////////////////////////////////////////////////////////////////////////
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index e51375ebc2..a73c2e2bd9 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -880,6 +880,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
}
if (EXTERNAL_AVX512ICL(cpu_flags) && ARCH_X86_64) {
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
+ c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
}
} else if (bit_depth == 10) {
--
2.17.1
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https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
To unsubscribe, visit link above, or email
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
@ 2022-03-11 7:52 ` jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
3 siblings, 0 replies; 10+ messages in thread
From: jianhua.wu-at-intel.com @ 2022-03-11 7:52 UTC (permalink / raw)
To: ffmpeg-devel; +Cc: Wu Jianhua
From: Wu Jianhua <jianhua.wu@intel.com>
ff_hevc_put_hevc_qpel_h4_8_sse4 993694
ff_hevc_put_hevc_qpel_h4_8_avx512icl 686647
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 9 +++++++++
libavcodec/x86/hevcdsp.h | 1 +
libavcodec/x86/hevcdsp_init.c | 1 +
3 files changed, 11 insertions(+)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index 4e39cdd7fe..ff59ae3509 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -87,6 +87,7 @@ QPEL_TABLE 12, 4, w, sse4
QPEL_TABLE 8,16, b, avx2
QPEL_TABLE 10, 8, w, avx2
+QPEL_TABLE 4, 1, b, avx512icl_h
QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h
@@ -1754,7 +1755,12 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
QPEL_LOAD_SHUF 2, 3
.loop:
QPEL_H_LOAD_COMPUTE 6, src
+%if %1 == 4
+ vpmovdw xm6, m6
+ movq [dstq], xm6
+%else
vpmovdw [dstq], m6
+%endif
LOOP_END dst, src, srcstride
RET
%endmacro
@@ -1822,6 +1828,9 @@ cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 7, 27, dst, src, srcstride, height, mx, m
%if ARCH_X86_64
%if HAVE_AVX512ICL_EXTERNAL
+INIT_XMM avx512icl
+HEVC_PUT_HEVC_QPEL_AVX512ICL 4, 8
+
INIT_YMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 8, 8
HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 6e3fc01ad0..51ffdc9628 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -233,6 +233,7 @@ WEIGHTING_PROTOTYPES(8, sse4);
WEIGHTING_PROTOTYPES(10, sse4);
WEIGHTING_PROTOTYPES(12, sse4);
+void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index a73c2e2bd9..58b91459ed 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -879,6 +879,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->add_residual[3] = ff_hevc_add_residual_32_8_avx2;
}
if (EXTERNAL_AVX512ICL(cpu_flags) && ARCH_X86_64) {
+ c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl;
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
--
2.17.1
_______________________________________________
ffmpeg-devel mailing list
ffmpeg-devel@ffmpeg.org
https://ffmpeg.org/mailman/listinfo/ffmpeg-devel
To unsubscribe, visit link above, or email
ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
^ permalink raw reply [flat|nested] 10+ messages in thread
* [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl jianhua.wu-at-intel.com
@ 2022-03-11 7:52 ` jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
3 siblings, 0 replies; 10+ messages in thread
From: jianhua.wu-at-intel.com @ 2022-03-11 7:52 UTC (permalink / raw)
To: ffmpeg-devel; +Cc: Wu Jianhua
From: Wu Jianhua <jianhua.wu@intel.com>
ff_hevc_put_hevc_qpel_h32_8_sse4 14122151
ff_hevc_put_hevc_qpel_h32_8_avx2 9337675
ff_hevc_put_hevc_qpel_h32_8_avx512icl 6424654
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 17 ++++++++++++++---
libavcodec/x86/hevcdsp.h | 1 +
libavcodec/x86/hevcdsp_init.c | 1 +
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index ff59ae3509..fc3faac376 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -91,6 +91,7 @@ QPEL_TABLE 4, 1, b, avx512icl_h
QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h
+QPEL_TABLE 32, 1, b, avx512icl_h
pb_qpel_shuffle_index: db 0, 1, 2, 3
db 1, 2, 3, 4
@@ -1736,12 +1737,17 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
; required: m0-m5
; %1: dst register index
; %2: name for src
-%macro QPEL_H_LOAD_COMPUTE 2
+; %3: optional offset
+%macro QPEL_H_LOAD_COMPUTE 2-3
+%assign %%offset 0
+%if %0 == 3
+%assign %%offset %3
+%endif
pxor m%1, m%1
%if mmsize == 64
- movu ym4, [%2q - 3]
+ movu ym4, [%2q + %%offset - 3]
%else
- movu xm4, [%2q - 3]
+ movu xm4, [%2q + %%offset - 3]
%endif
vpermb m5, m2, m4
vpermb m4, m3, m4
@@ -1760,6 +1766,10 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
movq [dstq], xm6
%else
vpmovdw [dstq], m6
+%endif
+%if %1 == 32
+ QPEL_H_LOAD_COMPUTE 7, src, 16
+ vpmovdw [dstq + 32], m7
%endif
LOOP_END dst, src, srcstride
RET
@@ -1837,6 +1847,7 @@ HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
INIT_ZMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
+HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8
%endif
%endif
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 51ffdc9628..8d3c3cc75f 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -236,6 +236,7 @@ WEIGHTING_PROTOTYPES(12, sse4);
void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
///////////////////////////////////////////////////////////////////////////////
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index 58b91459ed..ce5902c693 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -882,6 +882,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl;
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
+ c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
}
} else if (bit_depth == 10) {
--
2.17.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
` (2 preceding siblings ...)
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl jianhua.wu-at-intel.com
@ 2022-03-11 7:52 ` jianhua.wu-at-intel.com
2022-03-11 14:51 ` Henrik Gramner
3 siblings, 1 reply; 10+ messages in thread
From: jianhua.wu-at-intel.com @ 2022-03-11 7:52 UTC (permalink / raw)
To: ffmpeg-devel; +Cc: Wu Jianhua
From: Wu Jianhua <jianhua.wu@intel.com>
ff_hevc_put_hevc_qpel_h64_8_sse4 56782981
ff_hevc_put_hevc_qpel_h64_8_avx2 40097816
ff_hevc_put_hevc_qpel_h64_8_avx512icl 25488576
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 10 +++++++++-
libavcodec/x86/hevcdsp.h | 1 +
libavcodec/x86/hevcdsp_init.c | 1 +
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index fc3faac376..c07948dd9b 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -92,6 +92,7 @@ QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h
QPEL_TABLE 32, 1, b, avx512icl_h
+QPEL_TABLE 64, 1, b, avx512icl_h
pb_qpel_shuffle_index: db 0, 1, 2, 3
db 1, 2, 3, 4
@@ -1767,9 +1768,15 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
%else
vpmovdw [dstq], m6
%endif
-%if %1 == 32
+%if %1 > 16
QPEL_H_LOAD_COMPUTE 7, src, 16
vpmovdw [dstq + 32], m7
+%endif
+%if %1 > 32
+ QPEL_H_LOAD_COMPUTE 6, src, 32
+ QPEL_H_LOAD_COMPUTE 7, src, 48
+ vpmovdw [dstq + 64], m6
+ vpmovdw [dstq + 96], m7
%endif
LOOP_END dst, src, srcstride
RET
@@ -1848,6 +1855,7 @@ HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
INIT_ZMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8
+HEVC_PUT_HEVC_QPEL_AVX512ICL 64, 8
%endif
%endif
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 8d3c3cc75f..24e35bc032 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -237,6 +237,7 @@ void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+void ff_hevc_put_hevc_qpel_h64_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
///////////////////////////////////////////////////////////////////////////////
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index ce5902c693..f3061bda84 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -883,6 +883,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl;
+ c->put_hevc_qpel[9][0][1] = ff_hevc_put_hevc_qpel_h64_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
}
} else if (bit_depth == 10) {
--
2.17.1
_______________________________________________
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
@ 2022-03-11 14:51 ` Henrik Gramner
2022-03-17 8:53 ` Wu, Jianhua
0 siblings, 1 reply; 10+ messages in thread
From: Henrik Gramner @ 2022-03-11 14:51 UTC (permalink / raw)
To: FFmpeg development discussions and patches
All 5/5 LGTM.
_______________________________________________
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To unsubscribe, visit link above, or email
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
2022-03-11 14:51 ` Henrik Gramner
@ 2022-03-17 8:53 ` Wu, Jianhua
0 siblings, 0 replies; 10+ messages in thread
From: Wu, Jianhua @ 2022-03-17 8:53 UTC (permalink / raw)
To: FFmpeg development discussions and patches
Henrik Gramner:
> Sent: Friday, March 11, 2022 10:51 PM
> To: FFmpeg development discussions and patches <ffmpeg-
> devel@ffmpeg.org>
> Subject: Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add
> qpel_h64_8_avx512icl
>
> All 5/5 LGTM.
>
Hi there,
Are there any more comments or objections here?
If not, could someone help push this patchset?
Many thanks!
Jianhua
_______________________________________________
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To unsubscribe, visit link above, or email
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
2022-04-20 15:13 ` Xiang, Haihao
@ 2022-04-24 7:10 ` Xiang, Haihao
0 siblings, 0 replies; 10+ messages in thread
From: Xiang, Haihao @ 2022-04-24 7:10 UTC (permalink / raw)
To: ffmpeg-devel
On Wed, 2022-04-20 at 15:13 +0000, Xiang, Haihao wrote:
> On Thu, 2022-04-14 at 11:23 +0000, Wu Jianhua wrote:
> > Ping!
> > Wu Jianhua:
> > > Henrik Gramner:
> > > > Sent: Friday, March 11, 2022 10:51 PM
> > > > To: FFmpeg development discussions and patches <ffmpeg-
> > > > devel at ffmpeg.org>
> > > > Subject: Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add
> > > > qpel_h64_8_avx512icl
> > > >
> > > > All 5/5 LGTM.
> > > >
> > >
> > > Hi there,
> > >
> > > Are there any more comments or objections here?
> > > If not, could someone help push this patchset?
> > >
> > > Many thanks!
> > > Jianhua
>
> Ping, the patchset works well for me. I'll apply this patchset in a few days
> if
> no more comment.
>
Applied, thx
-Haihao
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
2022-04-14 11:23 Wu Jianhua
@ 2022-04-20 15:13 ` Xiang, Haihao
2022-04-24 7:10 ` Xiang, Haihao
0 siblings, 1 reply; 10+ messages in thread
From: Xiang, Haihao @ 2022-04-20 15:13 UTC (permalink / raw)
To: ffmpeg-devel
On Thu, 2022-04-14 at 11:23 +0000, Wu Jianhua wrote:
> Ping!
> Wu Jianhua:
> > Henrik Gramner:
> > > Sent: Friday, March 11, 2022 10:51 PM
> > > To: FFmpeg development discussions and patches <ffmpeg-
> > > devel at ffmpeg.org>
> > > Subject: Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add
> > > qpel_h64_8_avx512icl
> > >
> > > All 5/5 LGTM.
> > >
> >
> > Hi there,
> >
> > Are there any more comments or objections here?
> > If not, could someone help push this patchset?
> >
> > Many thanks!
> > Jianhua
Ping, the patchset works well for me. I'll apply this patchset in a few days if
no more comment.
Thanks
Haihao
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To unsubscribe, visit link above, or email
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl
@ 2022-04-14 11:23 Wu Jianhua
2022-04-20 15:13 ` Xiang, Haihao
0 siblings, 1 reply; 10+ messages in thread
From: Wu Jianhua @ 2022-04-14 11:23 UTC (permalink / raw)
To: ffmpeg-devel
Ping!
Wu Jianhua:
>Henrik Gramner:
>> Sent: Friday, March 11, 2022 10:51 PM
>> To: FFmpeg development discussions and patches <ffmpeg-
>> devel at ffmpeg.org>
>> Subject: Re: [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add
>> qpel_h64_8_avx512icl
>>
>> All 5/5 LGTM.
>>
>
>Hi there,
>
>Are there any more comments or objections here?
>If not, could someone help push this patchset?
>
>Many thanks!
>Jianhua
>
_______________________________________________
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To unsubscribe, visit link above, or email
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-04-24 7:10 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 14:51 ` Henrik Gramner
2022-03-17 8:53 ` Wu, Jianhua
2022-04-14 11:23 Wu Jianhua
2022-04-20 15:13 ` Xiang, Haihao
2022-04-24 7:10 ` Xiang, Haihao
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