From 1a83f04530e3c299b28bd56dd10694aaa6b963d7 Mon Sep 17 00:00:00 2001 From: sunyuechi Date: Tue, 27 Feb 2024 00:07:08 +0800 Subject: [PATCH 3/3] lavc/vp9dsp: R-V V ipred dc dc_left dc_top C908: vp9_dc_16x16_8bpp_c: 117.0 vp9_dc_16x16_8bpp_rvv_i32: 81.7 vp9_dc_32x32_8bpp_c: 373.2 vp9_dc_32x32_8bpp_rvv_i32: 171.7 vp9_dc_left_16x16_8bpp_c: 101.2 vp9_dc_left_16x16_8bpp_rvv_i32: 76.7 vp9_dc_left_32x32_8bpp_c: 341.2 vp9_dc_left_32x32_8bpp_rvv_i32: 164.7 vp9_dc_top_16x16_8bpp_c: 101.0 vp9_dc_top_16x16_8bpp_rvv_i32: 76.7 vp9_dc_top_32x32_8bpp_c: 340.2 vp9_dc_top_32x32_8bpp_rvv_i32: 164.7 --- libavcodec/riscv/vp9dsp_init.c | 14 +++++ libavcodec/riscv/vp9dsp_rvv.S | 104 +++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) diff --git a/libavcodec/riscv/vp9dsp_init.c b/libavcodec/riscv/vp9dsp_init.c index 5b68302235..65617ab21f 100644 --- a/libavcodec/riscv/vp9dsp_init.c +++ b/libavcodec/riscv/vp9dsp_init.c @@ -30,6 +30,13 @@ void ff_vp9_ipred_h_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, void ff_vp9_ipred_h_8x8_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); void ff_vp9_ipred_h_4x4_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_top_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_top_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_left_32x32_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); +void ff_vp9_ipred_dc_left_16x16_rvv(uint8_t *dst, ptrdiff_t stride, const uint8_t *l, const uint8_t *a); + av_cold void ff_vp9dsp_init_riscv(VP9DSPContext *dsp, int bpp, int bitexact) { #if HAVE_RVV @@ -43,6 +50,13 @@ av_cold void ff_vp9dsp_init_riscv(VP9DSPContext *dsp, int bpp, int bitexact) dsp->intra_pred[TX_16X16][HOR_PRED] = ff_vp9_ipred_h_16x16_rvv; dsp->intra_pred[TX_8X8][HOR_PRED] = ff_vp9_ipred_h_8x8_rvv; dsp->intra_pred[TX_4X4][HOR_PRED] = ff_vp9_ipred_h_4x4_rvv; + + dsp->intra_pred[TX_32X32][DC_PRED] = ff_vp9_ipred_dc_32x32_rvv; + dsp->intra_pred[TX_16X16][DC_PRED] = ff_vp9_ipred_dc_16x16_rvv; + dsp->intra_pred[TX_32X32][LEFT_DC_PRED] = ff_vp9_ipred_dc_left_32x32_rvv; + dsp->intra_pred[TX_16X16][LEFT_DC_PRED] = ff_vp9_ipred_dc_left_16x16_rvv; + dsp->intra_pred[TX_32X32][TOP_DC_PRED] = ff_vp9_ipred_dc_top_32x32_rvv; + dsp->intra_pred[TX_16X16][TOP_DC_PRED] = ff_vp9_ipred_dc_top_16x16_rvv; } } #endif diff --git a/libavcodec/riscv/vp9dsp_rvv.S b/libavcodec/riscv/vp9dsp_rvv.S index 578fbce061..e22bd943b4 100644 --- a/libavcodec/riscv/vp9dsp_rvv.S +++ b/libavcodec/riscv/vp9dsp_rvv.S @@ -127,3 +127,107 @@ func ff_vp9_ipred_h_4x4_rvv, zve32x ret endfunc + +.macro getdc type +.ifc \type,top + vle8.v v8, (a3) + vwredsumu.vs v16, v8, v16 +.elseif \type == left + vle8.v v8, (a2) + vwredsumu.vs v16, v8, v16 +.elseif \type == none + vle8.v v8, (a2) + vwredsumu.vs v16, v8, v16 + vle8.v v8, (a3) + vwredsumu.vs v16, v8, v16 +.endif + vsetivli zero, 1, e16, m1, ta, ma + vmv.x.s t1, v16 +.endm + +.macro dc32x32 type + vsetivli zero, 1, e16, m1, ta, ma + vmv.s.x v16, zero + + li t0, 32 + vsetvli zero, t0, e8, m2, ta, ma + getdc \type + +.ifc \type,top + addi t1, t1, 16 + srai t1, t1, 5 +.elseif \type == left + addi t1, t1, 16 + srai t1, t1, 5 +.elseif \type == none + addi t1, t1, 32 + srai t1, t1, 6 +.endif + + vsetvli zero, t0, e8, m2, ta, ma + vmv.v.x v0, t1 + + vsetivli zero, 8, e8, mf2, ta, ma + .rept 31 + vse32.v v0, (a0) + add a0, a0, a1 + .endr + vse32.v v0, (a0) + + ret +.endm + +.macro dc16x16 type + vsetivli zero, 1, e16, m1, ta, ma + vmv.s.x v16, zero + + vsetivli zero, 16, e8, m1, ta, ma + getdc \type + +.ifc \type,top + addi t1, t1, 8 + srai t1, t1, 4 +.elseif \type == left + addi t1, t1, 8 + srai t1, t1, 4 +.elseif \type == none + addi t1, t1, 16 + srai t1, t1, 5 +.endif + + vsetivli zero, 16, e8, m1, ta, ma + vmv.v.x v0, t1 + + vsetivli zero, 4, e8, mf4, ta, ma + .rept 15 + vse32.v v0, (a0) + add a0, a0, a1 + .endr + vse32.v v0, (a0) + + ret +.endm + +func ff_vp9_ipred_dc_32x32_rvv, zve32x + dc32x32 none +endfunc + +func ff_vp9_ipred_dc_16x16_rvv, zve32x + dc16x16 none +endfunc + +func ff_vp9_ipred_dc_left_32x32_rvv, zve32x + dc32x32 left +endfunc + +func ff_vp9_ipred_dc_left_16x16_rvv, zve32x + dc16x16 left +endfunc + +func ff_vp9_ipred_dc_top_32x32_rvv, zve32x + dc32x32 top +endfunc + +func ff_vp9_ipred_dc_top_16x16_rvv, zve32x + dc16x16 top +endfunc -- 2.44.0