From: flow gg <hlefthleft@gmail.com>
To: FFmpeg development discussions and patches <ffmpeg-devel@ffmpeg.org>
Subject: Re: [FFmpeg-devel] [PATCH] lavc/vc1dsp: R-V V inv_trans
Date: Wed, 6 Dec 2023 07:50:24 +0800
Message-ID: <CAEa-L+uLu1AVkPdY5icOdY5+vsSRfaY823uSLbhCqC5wnhkzzg@mail.gmail.com> (raw)
In-Reply-To: <3629844.N5QbZPjnrc@basile.remlab.net>
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I'm sorry for my carelessness.It's because I used to build and run
manually, but now I've switched to a script to do it, so I accidentally
missed the error.I will modify the script and to avoid this kind of issue
in the future.
libavcodec/riscv/vc1dsp_rvv.S:35: Error: improper CSRxI immediate
Changed.
Rémi Denis-Courmont <remi@remlab.net> 于2023年12月6日周三 04:11写道:
> Le tiistaina 5. joulukuuta 2023, 21.25.12 EET flow gg a écrit :
> > > This block can be folded into the next. You don't need to check VLENB
> >
> > twice.
> >
> > Changed.
> >
> > > Instruction scheduling could be better, especially on in-order CPUs.
> >
> > I put the vload at the front, and then proceeded with the t2 operation,
> but
> > I'm not sure...
> >
> > > You don't need to reset the AVL here, just pass zero.
> >
> > Changed.
> >
> > > vsetivli
> >
> > Changed.
>
> You changed more than I asked for. The immediate AVL is a 5-bit unsigned
> integer, so it should not be possible to assemble 32 or 64, unless you
> have a
> preprocessor that silently rewrites `vsetivli` into `vsetvli` (If so, that
> sounds very iffy because `vsetivli zero` has no scratch X register to work
> with).
>
> FWIW CanMV-K230 boards are on sale for under 500 RMB.
>
> --
> レミ・デニ-クールモン
> http://www.remlab.net/
>
>
>
> _______________________________________________
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From 653b8a8651aaa6c22e8a3a400b3e493eb03704f2 Mon Sep 17 00:00:00 2001
From: sunyuechi <sunyuechi@iscas.ac.cn>
Date: Fri, 1 Dec 2023 10:07:40 +0800
Subject: [PATCH] lavc/vc1dsp: R-V V inv_trans
c910
vc1dsp.vc1_inv_trans_4x4_dc_c: 84.0
vc1dsp.vc1_inv_trans_4x4_dc_rvv_i32: 74.0
vc1dsp.vc1_inv_trans_4x8_dc_c: 150.2
vc1dsp.vc1_inv_trans_4x8_dc_rvv_i32: 83.5
vc1dsp.vc1_inv_trans_8x4_dc_c: 129.0
vc1dsp.vc1_inv_trans_8x4_dc_rvv_i64: 75.7
vc1dsp.vc1_inv_trans_8x8_dc_c: 254.7
vc1dsp.vc1_inv_trans_8x8_dc_rvv_i64: 90.5
---
libavcodec/riscv/Makefile | 2 +
libavcodec/riscv/vc1dsp_init.c | 49 ++++++++++++++
libavcodec/riscv/vc1dsp_rvv.S | 113 +++++++++++++++++++++++++++++++++
libavcodec/vc1dsp.c | 2 +
libavcodec/vc1dsp.h | 1 +
5 files changed, 167 insertions(+)
create mode 100644 libavcodec/riscv/vc1dsp_init.c
create mode 100644 libavcodec/riscv/vc1dsp_rvv.S
diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
index 2d0e6c19c8..442c5961ea 100644
--- a/libavcodec/riscv/Makefile
+++ b/libavcodec/riscv/Makefile
@@ -39,5 +39,7 @@ OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_init.o \
RVV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvv.o
OBJS-$(CONFIG_UTVIDEO_DECODER) += riscv/utvideodsp_init.o
RVV-OBJS-$(CONFIG_UTVIDEO_DECODER) += riscv/utvideodsp_rvv.o
+OBJS-$(CONFIG_VC1DSP) += riscv/vc1dsp_init.o
+RVV-OBJS-$(CONFIG_VC1DSP) += riscv/vc1dsp_rvv.o
OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_init.o
RVV-OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_rvv.o
diff --git a/libavcodec/riscv/vc1dsp_init.c b/libavcodec/riscv/vc1dsp_init.c
new file mode 100644
index 0000000000..0d22d28f4d
--- /dev/null
+++ b/libavcodec/riscv/vc1dsp_init.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2023 Institue of Software Chinese Academy of Sciences (ISCAS).
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdint.h>
+
+#include "libavutil/attributes.h"
+#include "libavutil/cpu.h"
+#include "libavutil/riscv/cpu.h"
+#include "libavcodec/vc1.h"
+
+void ff_vc1_inv_trans_8x8_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
+void ff_vc1_inv_trans_4x8_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
+void ff_vc1_inv_trans_8x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
+void ff_vc1_inv_trans_4x4_dc_rvv(uint8_t *dest, ptrdiff_t stride, int16_t *block);
+
+av_cold void ff_vc1dsp_init_riscv(VC1DSPContext *dsp)
+{
+#if HAVE_RVV
+ int flags = av_get_cpu_flags();
+
+ if (ff_get_rv_vlenb() >= 16) {
+ if (flags & AV_CPU_FLAG_RVV_I64) {
+ dsp->vc1_inv_trans_8x8_dc = ff_vc1_inv_trans_8x8_dc_rvv;
+ dsp->vc1_inv_trans_8x4_dc = ff_vc1_inv_trans_8x4_dc_rvv;
+ }
+ if (flags & AV_CPU_FLAG_RVV_I32) {
+ dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv;
+ dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv;
+ }
+ }
+#endif
+}
diff --git a/libavcodec/riscv/vc1dsp_rvv.S b/libavcodec/riscv/vc1dsp_rvv.S
new file mode 100644
index 0000000000..1a503ecc87
--- /dev/null
+++ b/libavcodec/riscv/vc1dsp_rvv.S
@@ -0,0 +1,113 @@
+/*
+ * Copyright (c) 2023 Institue of Software Chinese Academy of Sciences (ISCAS).
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "libavutil/riscv/asm.S"
+
+func ff_vc1_inv_trans_8x8_dc_rvv, zve64x
+ lh t2, (a2)
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vlse64.v v0, (a0), a1
+ sh1add t2, t2, t2
+ addi t2, t2, 1
+ srai t2, t2, 1
+ sh1add t2, t2, t2
+ addi t2, t2, 16
+ srai t2, t2, 5
+ li t0, 8*8
+ vsetvli zero, t0, e16, m8, ta, ma
+ vzext.vf2 v8, v0
+ vadd.vx v8, v8, t2
+ vmax.vx v8, v8, zero
+ vsetvli zero, zero, e8, m4, ta, ma
+ vnclipu.wi v0, v8, 0
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vsse64.v v0, (a0), a1
+ ret
+endfunc
+
+func ff_vc1_inv_trans_4x8_dc_rvv, zve32x
+ lh t2, (a2)
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vlse32.v v0, (a0), a1
+ slli t1, t2, 4
+ add t2, t2, t1
+ addi t2, t2, 4
+ srai t2, t2, 3
+ sh1add t2, t2, t2
+ slli t2, t2, 2
+ addi t2, t2, 64
+ srai t2, t2, 7
+ li t0, 4*8
+ vsetvli zero, t0, e16, m4, ta, ma
+ vzext.vf2 v4, v0
+ vadd.vx v4, v4, t2
+ vmax.vx v4, v4, zero
+ vsetvli zero, zero, e8, m2, ta, ma
+ vnclipu.wi v0, v4, 0
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vsse32.v v0, (a0), a1
+ ret
+endfunc
+
+func ff_vc1_inv_trans_8x4_dc_rvv, zve64x
+ lh t2, (a2)
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vlse64.v v0, (a0), a1
+ sh1add t2, t2, t2
+ addi t2, t2, 1
+ srai t2, t2, 1
+ slli t1, t2, 4
+ add t2, t2, t1
+ addi t2, t2, 64
+ srai t2, t2, 7
+ li t0, 8*4
+ vsetvli zero, t0, e16, m4, ta, ma
+ vzext.vf2 v4, v0
+ vadd.vx v4, v4, t2
+ vmax.vx v4, v4, zero
+ vsetvli zero, zero, e8, m2, ta, ma
+ vnclipu.wi v0, v4, 0
+ vsetivli zero, 8, e8, mf2, ta, ma
+ vsse64.v v0, (a0), a1
+ ret
+endfunc
+
+func ff_vc1_inv_trans_4x4_dc_rvv, zve32x
+ lh t2, (a2)
+ vsetivli zero, 4, e8, mf2, ta, ma
+ vlse32.v v0, (a0), a1
+ slli t1, t2, 4
+ add t2, t2, t1
+ addi t2, t2, 4
+ srai t2, t2, 3
+ slli t1, t2, 4
+ add t2, t2, t1
+ addi t2, t2, 64
+ srai t2, t2, 7
+ vsetivli zero, 4*4, e16, m2, ta, ma
+ vzext.vf2 v2, v0
+ vadd.vx v2, v2, t2
+ vmax.vx v2, v2, zero
+ vsetvli zero, zero, e8, m1, ta, ma
+ vnclipu.wi v0, v2, 0
+ vsetivli zero, 4, e8, mf2, ta, ma
+ vsse32.v v0, (a0), a1
+ ret
+endfunc
diff --git a/libavcodec/vc1dsp.c b/libavcodec/vc1dsp.c
index 62c8eb21fa..2caa3c6863 100644
--- a/libavcodec/vc1dsp.c
+++ b/libavcodec/vc1dsp.c
@@ -1039,6 +1039,8 @@ av_cold void ff_vc1dsp_init(VC1DSPContext *dsp)
ff_vc1dsp_init_arm(dsp);
#elif ARCH_PPC
ff_vc1dsp_init_ppc(dsp);
+#elif ARCH_RISCV
+ ff_vc1dsp_init_riscv(dsp);
#elif ARCH_X86
ff_vc1dsp_init_x86(dsp);
#elif ARCH_MIPS
diff --git a/libavcodec/vc1dsp.h b/libavcodec/vc1dsp.h
index 7ed1776ca7..e3b90d2b62 100644
--- a/libavcodec/vc1dsp.h
+++ b/libavcodec/vc1dsp.h
@@ -89,6 +89,7 @@ void ff_vc1dsp_init(VC1DSPContext* c);
void ff_vc1dsp_init_aarch64(VC1DSPContext* dsp);
void ff_vc1dsp_init_arm(VC1DSPContext* dsp);
void ff_vc1dsp_init_ppc(VC1DSPContext *c);
+void ff_vc1dsp_init_riscv(VC1DSPContext *c);
void ff_vc1dsp_init_x86(VC1DSPContext* dsp);
void ff_vc1dsp_init_mips(VC1DSPContext* dsp);
void ff_vc1dsp_init_loongarch(VC1DSPContext* dsp);
--
2.43.0
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next prev parent reply other threads:[~2023-12-05 23:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-03 14:40 flow gg
2023-12-03 17:17 ` Rémi Denis-Courmont
2023-12-04 8:48 ` flow gg
2023-12-04 15:15 ` Rémi Denis-Courmont
2023-12-04 21:14 ` flow gg
2023-12-05 5:25 ` flow gg
2023-12-05 16:41 ` Rémi Denis-Courmont
2023-12-05 19:25 ` flow gg
2023-12-05 20:10 ` Rémi Denis-Courmont
2023-12-05 23:50 ` flow gg [this message]
2023-12-06 2:23 ` flow gg
2023-12-08 7:31 ` flow gg
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