From: flow gg <hlefthleft@gmail.com>
To: FFmpeg development discussions and patches <ffmpeg-devel@ffmpeg.org>
Subject: Re: [FFmpeg-devel] [PATCH 1/4] lavc/vp9dsp: R-V V mc bilin h v
Date: Sat, 3 Aug 2024 17:52:31 +0800
Message-ID: <CAEa-L+swd372O1GbCpJB_3NT+hak+m0iNvHgkgRFccDpKDstxA@mail.gmail.com> (raw)
In-Reply-To: <tencent_BB59F1D25C0BD67E9806CFB6AAADC5E1D006@qq.com>
> Looks OK, but missing CFI landing pads.
Added lpad.
<uk7b@foxmail.com> 于2024年8月3日周六 17:51写道：
> From: sunyuechi <sunyuechi@iscas.ac.cn>
>
> C908 X60
> vp9_avg_bilin_4h_8bpp_c : 5.5 4.7
> vp9_avg_bilin_4h_8bpp_rvv_i32 : 1.7 1.5
> vp9_avg_bilin_4v_8bpp_c : 5.5 4.7
> vp9_avg_bilin_4v_8bpp_rvv_i32 : 1.5 1.2
> vp9_avg_bilin_8h_8bpp_c : 20.0 17.7
> vp9_avg_bilin_8h_8bpp_rvv_i32 : 3.0 2.7
> vp9_avg_bilin_8v_8bpp_c : 20.7 18.7
> vp9_avg_bilin_8v_8bpp_rvv_i32 : 3.0 2.7
> vp9_avg_bilin_16h_8bpp_c : 78.2 69.7
> vp9_avg_bilin_16h_8bpp_rvv_i32 : 7.0 6.2
> vp9_avg_bilin_16v_8bpp_c : 98.5 73.2
> vp9_avg_bilin_16v_8bpp_rvv_i32 : 7.0 6.0
> vp9_avg_bilin_32h_8bpp_c : 325.5 275.5
> vp9_avg_bilin_32h_8bpp_rvv_i32 : 23.0 20.5
> vp9_avg_bilin_32v_8bpp_c : 342.2 290.0
> vp9_avg_bilin_32v_8bpp_rvv_i32 : 21.7 19.5
> vp9_avg_bilin_64h_8bpp_c : 1263.7 1095.7
> vp9_avg_bilin_64h_8bpp_rvv_i32 : 91.2 81.2
> vp9_avg_bilin_64v_8bpp_c : 1331.7 1155.2
> vp9_avg_bilin_64v_8bpp_rvv_i32 : 91.2 81.0
> vp9_put_bilin_4h_8bpp_c : 4.5 4.0
> vp9_put_bilin_4h_8bpp_rvv_i32 : 1.0 1.0
> vp9_put_bilin_4v_8bpp_c : 4.7 4.2
> vp9_put_bilin_4v_8bpp_rvv_i32 : 1.0 1.0
> vp9_put_bilin_8h_8bpp_c : 16.7 15.0
> vp9_put_bilin_8h_8bpp_rvv_i32 : 2.2 2.0
> vp9_put_bilin_8v_8bpp_c : 17.5 15.7
> vp9_put_bilin_8v_8bpp_rvv_i32 : 2.2 2.0
> vp9_put_bilin_16h_8bpp_c : 65.2 58.0
> vp9_put_bilin_16h_8bpp_rvv_i32 : 6.0 5.5
> vp9_put_bilin_16v_8bpp_c : 69.2 61.7
> vp9_put_bilin_16v_8bpp_rvv_i32 : 5.7 5.2
> vp9_put_bilin_32h_8bpp_c : 273.2 229.0
> vp9_put_bilin_32h_8bpp_rvv_i32 : 19.7 17.7
> vp9_put_bilin_32v_8bpp_c : 290.5 243.7
> vp9_put_bilin_32v_8bpp_rvv_i32 : 18.7 16.7
> vp9_put_bilin_64h_8bpp_c : 1040.5 910.5
> vp9_put_bilin_64h_8bpp_rvv_i32 : 82.5 73.0
> vp9_put_bilin_64v_8bpp_c : 1108.5 971.0
> vp9_put_bilin_64v_8bpp_rvv_i32 : 82.2 73.2
> ---
> libavcodec/riscv/vp9_mc_rvv.S | 116 +++++++++++++++++++++++++++++++++
> libavcodec/riscv/vp9dsp.h | 12 ++--
> libavcodec/riscv/vp9dsp_init.c | 21 ++++++
> 3 files changed, 143 insertions(+), 6 deletions(-)
>
> diff --git a/libavcodec/riscv/vp9_mc_rvv.S b/libavcodec/riscv/vp9_mc_rvv.S
> index 8d776661d9..817cc58b5e 100644
> --- a/libavcodec/riscv/vp9_mc_rvv.S
> +++ b/libavcodec/riscv/vp9_mc_rvv.S
> @@ -54,6 +54,122 @@ func ff_vp9_avg\len\()_rvv, zve32x
> endfunc
> .endm
>
> +.macro bilin_load_h dst, op, mn
> + addi t5, a2, 1
> + vle8.v v8, (a2)
> + vle8.v v0, (t5)
> + vwmulu.vx v16, v0, \mn
> + vwmaccsu.vx v16, t1, v8
> + vwadd.wx v16, v16, t4
> + vnsra.wi v16, v16, 4
> + vadd.vv \dst, v16, v8
> +.ifc \op,avg
> + vle8.v v16, (a0)
> + vaaddu.vv \dst, \dst, v16
> +.endif
> +.endm
> +
> +.macro bilin_h_v op, type, mn
> +func ff_\op\()_vp9_bilin_64\type\()_rvv, zve32x
> + lpad 0
> + vsetvlstatic8 64, t0, 64
> +.ifc \op,avg
> + csrwi vxrm, 0
> +.endif
> + li t4, 8
> + neg t1, \mn
> +1:
> + addi a4, a4, -1
> +.ifc \type,v
> + add t5, a2, a3
> +.else
> + addi t5, a2, 1
> +.endif
> + vle8.v v8, (a2)
> + vle8.v v0, (t5)
> + vwmulu.vx v16, v0, \mn
> + vwmaccsu.vx v16, t1, v8
> + vwadd.wx v16, v16, t4
> + vnsra.wi v16, v16, 4
> + vadd.vv v0, v16, v8
> +.ifc \op,avg
> + vle8.v v16, (a0)
> + vaaddu.vv v0, v0, v16
> +.endif
> + vse8.v v0, (a0)
> + add a2, a2, a3
> + add a0, a0, a1
> + bnez a4, 1b
> + ret
> +
> +.Lbilin_\type\op:
> +.ifc \op,avg
> + csrwi vxrm, 0
> +.endif
> + li t4, 8
> + neg t1, \mn
> +1:
> + addi a4, a4, -2
> + add t6, a0, a1
> + add t0, a2, a3
> + vle8.v v8, (a2)
> + vle8.v v4, (t0)
> +.ifc \type,v
> + add t2, t0, a3
> + vwmulu.vx v16, v4, \mn
> +.else
> + addi t3, a2, 1
> + addi t2, t0, 1
> + vle8.v v0, (t3)
> + vwmulu.vx v16, v0, \mn
> +.endif
> + vle8.v v12, (t2)
> + vwmulu.vx v20, v12, \mn
> + vwmaccsu.vx v16, t1, v8
> + vwmaccsu.vx v20, t1, v4
> + vwadd.wx v16, v16, t4
> + vwadd.wx v20, v20, t4
> + vnsra.wi v16, v16, 4
> + vnsra.wi v20, v20, 4
> + vadd.vv v0, v16, v8
> + vadd.vv v12, v20, v4
> +.ifc \op,avg
> + vle8.v v16, (a0)
> + vle8.v v20, (t6)
> + vaaddu.vv v0, v0, v16
> + vaaddu.vv v12, v12, v20
> +.endif
> + vse8.v v0, (a0)
> + vse8.v v12, (t6)
> + add a2, t0, a3
> + add a0, t6, a1
> + bnez a4, 1b
> +
> + ret
> +endfunc
> +.endm
> +
> .irp len, 64, 32, 16, 8, 4
> copy_avg \len
> .endr
> +
> +bilin_h_v put, h, a5
> +bilin_h_v avg, h, a5
> +bilin_h_v put, v, a6
> +bilin_h_v avg, v, a6
> +
> +.macro func_bilin_h_v len, op, type
> +func ff_\op\()_vp9_bilin_\len\()\type\()_rvv, zve32x
> + lpad 0
> + vsetvlstatic8 \len, t0, 64
> + j .Lbilin_\type\()\op
> +endfunc
> +.endm
> +
> +.irp len, 32, 16, 8, 4
> + .irp op, put, avg
> + .irp type, h, v
> + func_bilin_h_v \len, \op, \type
> + .endr
> + .endr
> +.endr
> diff --git a/libavcodec/riscv/vp9dsp.h b/libavcodec/riscv/vp9dsp.h
> index ff8431591c..8fb326dae0 100644
> --- a/libavcodec/riscv/vp9dsp.h
> +++ b/libavcodec/riscv/vp9dsp.h
> @@ -113,27 +113,27 @@ void ff_avg_8tap_##type##_##SIZE##hv_rvv(uint8_t
> *dst, ptrdiff_t dststride, \
> int h, int mx, int my);
>
> #define VP9_BILINEAR_RISCV_RVV_FUNC(SIZE)
> \
> -void ff_put_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_put_vp9_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t srcstride,
> \
> int h, int mx, int my);
> \
>
> \
> -void ff_put_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_put_vp9_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t srcstride,
> \
> int h, int mx, int my);
> \
>
> \
> -void ff_put_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_put_vp9_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t
> srcstride, \
> int h, int mx, int my);
> \
>
> \
> -void ff_avg_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_avg_vp9_bilin_##SIZE##h_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t srcstride,
> \
> int h, int mx, int my);
> \
>
> \
> -void ff_avg_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_avg_vp9_bilin_##SIZE##v_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t srcstride,
> \
> int h, int mx, int my);
> \
>
> \
> -void ff_avg_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> +void ff_avg_vp9_bilin_##SIZE##hv_rvv(uint8_t *dst, ptrdiff_t dststride,
> \
> const uint8_t *src, ptrdiff_t
> srcstride, \
> int h, int mx, int my);
>
> diff --git a/libavcodec/riscv/vp9dsp_init.c
> b/libavcodec/riscv/vp9dsp_init.c
> index 2034e1c976..83dbe1b5d9 100644
> --- a/libavcodec/riscv/vp9dsp_init.c
> +++ b/libavcodec/riscv/vp9dsp_init.c
> @@ -63,6 +63,27 @@ static av_cold void vp9dsp_mc_init_riscv(VP9DSPContext
> *dsp, int bpp)
> init_fpel(3, 8);
> init_fpel(4, 4);
>
> + dsp->mc[0][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_64v_rvv;
> + dsp->mc[0][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_64h_rvv;
> + dsp->mc[0][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_64v_rvv;
> + dsp->mc[0][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_64h_rvv;
> + dsp->mc[1][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_32v_rvv;
> + dsp->mc[1][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_32h_rvv;
> + dsp->mc[1][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_32v_rvv;
> + dsp->mc[1][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_32h_rvv;
> + dsp->mc[2][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_16v_rvv;
> + dsp->mc[2][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_16h_rvv;
> + dsp->mc[2][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_16v_rvv;
> + dsp->mc[2][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_16h_rvv;
> + dsp->mc[3][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_8v_rvv;
> + dsp->mc[3][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_8h_rvv;
> + dsp->mc[3][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_8v_rvv;
> + dsp->mc[3][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_8h_rvv;
> + dsp->mc[4][FILTER_BILINEAR ][0][0][1] = ff_put_vp9_bilin_4v_rvv;
> + dsp->mc[4][FILTER_BILINEAR ][0][1][0] = ff_put_vp9_bilin_4h_rvv;
> + dsp->mc[4][FILTER_BILINEAR ][1][0][1] = ff_avg_vp9_bilin_4v_rvv;
> + dsp->mc[4][FILTER_BILINEAR ][1][1][0] = ff_avg_vp9_bilin_4h_rvv;
> +
> #undef init_fpel
> }
> #endif
> --
> 2.46.0
>
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next prev parent reply other threads:[~2024-08-03 9:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-03 9:50 uk7b
2024-08-03 9:52 ` flow gg [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-08-09 14:24 uk7b
2024-08-01 12:08 uk7b
2024-08-02 18:26 ` Rémi Denis-Courmont
2024-08-02 18:27 ` Rémi Denis-Courmont
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