* [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension
@ 2024-05-07 19:12 Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-07 19:12 UTC (permalink / raw)
To: ffmpeg-devel
---
Makefile | 2 +-
configure | 3 +++
doc/APIchanges | 3 +++
ffbuild/arch.mak | 1 +
libavutil/cpu.h | 1 +
libavutil/tests/cpu.c | 1 +
tests/checkasm/checkasm.c | 1 +
7 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index de727cbe00..4c3af09fec 100644
--- a/Makefile
+++ b/Makefile
@@ -101,7 +101,7 @@ SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \
ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \
MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
- MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS \
+ MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS RVVB-OBJS \
OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS
define RESET
diff --git a/configure b/configure
index 00c3cee33f..2c74b1e8a3 100755
--- a/configure
+++ b/configure
@@ -2222,6 +2222,7 @@ ARCH_EXT_LIST_PPC="
ARCH_EXT_LIST_RISCV="
rv
rvv
+ rv_zvbb
"
ARCH_EXT_LIST_X86="
@@ -2760,6 +2761,7 @@ power8_deps="vsx"
rv_deps="riscv"
rvv_deps="rv"
+rv_zvbb_deps="rvv"
loongson2_deps="mips"
loongson3_deps="mips"
@@ -6379,6 +6381,7 @@ elif enabled riscv; then
enabled rv && check_inline_asm rv '".option arch, +zbb\nrev8 t0, t1"'
enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"'
+ enabled rv_zvbb && check_inline_asm rv_zvbb '".option arch, +zvbb\nvclz.v v0, v8"'
elif enabled x86; then
diff --git a/doc/APIchanges b/doc/APIchanges
index 824beec9d3..238d22c135 100644
--- a/doc/APIchanges
+++ b/doc/APIchanges
@@ -2,6 +2,9 @@ The last version increases of all libraries were on 2024-03-07
API changes, most recent first:
+2024-05-10 - xxxxxxxxx - lavu 59.18.100 - cpu.h
+ Add AV_CPU_FLAG_RV_ZVBB.
+
2024-05-04 - xxxxxxxxxx - lavu 59.17.100 - opt.h
Add AV_OPT_TYPE_UINT and av_opt_eval_uint().
diff --git a/ffbuild/arch.mak b/ffbuild/arch.mak
index 23a3feb090..3fc40e5e5d 100644
--- a/ffbuild/arch.mak
+++ b/ffbuild/arch.mak
@@ -17,6 +17,7 @@ OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes)
OBJS-$(HAVE_RV) += $(RV-OBJS) $(RV-OBJS-yes)
OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
+OBJS-$(HAVE_RV_ZVBB) += $(RVVB-OBJS) $(RVVB-OBJS-yes)
OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes)
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 8dff341886..cc19828d4b 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -90,6 +90,7 @@
#define AV_CPU_FLAG_RVV_F64 (1 << 6) ///< Vectors of double's
#define AV_CPU_FLAG_RVB_BASIC (1 << 7) ///< Basic bit-manipulations
#define AV_CPU_FLAG_RVB_ADDR (1 << 8) ///< Address bit-manipulations
+#define AV_CPU_FLAG_RV_ZVBB (1 << 9) ///< Vector basic bit-manipulations
/**
* Return the flags which specify extensions supported by the CPU.
diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c
index d91bfeab5c..10e620963b 100644
--- a/libavutil/tests/cpu.c
+++ b/libavutil/tests/cpu.c
@@ -94,6 +94,7 @@ static const struct {
{ AV_CPU_FLAG_RVV_F32, "zve32f" },
{ AV_CPU_FLAG_RVV_I64, "zve64x" },
{ AV_CPU_FLAG_RVV_F64, "zve64d" },
+ { AV_CPU_FLAG_RV_ZVBB, "zvbb" },
#endif
{ 0 }
};
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 9be32fc16e..9a05c1f95e 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -282,6 +282,7 @@ static const struct {
{ "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 },
{ "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },
{ "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 },
+ { "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
#elif ARCH_MIPS
{ "MMI", "mmi", AV_CPU_FLAG_MMI },
{ "MSA", "msa", AV_CPU_FLAG_MSA },
--
2.43.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection
2024-05-07 19:12 [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Rémi Denis-Courmont
@ 2024-05-07 19:12 ` Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 3/3] lavc/ac3dsp: add R-V Zvbb extract_exponents Rémi Denis-Courmont
2024-05-07 20:34 ` [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Martin Storsjö
2 siblings, 0 replies; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-07 19:12 UTC (permalink / raw)
To: ffmpeg-devel
This requires Linux kernel version 6.8 or later.
---
libavutil/riscv/cpu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c
index 69d1afe853..3cf4e25bc9 100644
--- a/libavutil/riscv/cpu.c
+++ b/libavutil/riscv/cpu.c
@@ -54,6 +54,10 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVB_ADDR;
if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
ret |= AV_CPU_FLAG_RVB_BASIC;
+#ifdef RISCV_HWPROBE_EXT_ZVBB
+ if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
+ ret |= AV_CPU_FLAG_RV_ZVBB;
+#endif
} else
#endif
#if HAVE_GETAUXVAL
@@ -105,6 +109,9 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVV_F64;
#endif
#endif
+#endif
+#ifdef __riscv_zvbb
+ ret |= AV_CPU_FLAG_RV_ZVBB;
#endif
return ret;
--
2.43.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [FFmpeg-devel] [PATCH 3/3] lavc/ac3dsp: add R-V Zvbb extract_exponents
2024-05-07 19:12 [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
@ 2024-05-07 19:12 ` Rémi Denis-Courmont
2024-05-07 20:34 ` [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Martin Storsjö
2 siblings, 0 replies; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-07 19:12 UTC (permalink / raw)
To: ffmpeg-devel
---
libavcodec/riscv/Makefile | 1 +
libavcodec/riscv/ac3dsp_init.c | 5 ++++
libavcodec/riscv/ac3dsp_rvvb.S | 43 ++++++++++++++++++++++++++++++++++
3 files changed, 49 insertions(+)
create mode 100644 libavcodec/riscv/ac3dsp_rvvb.S
diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
index 11d47f9a57..bd24f18cb9 100644
--- a/libavcodec/riscv/Makefile
+++ b/libavcodec/riscv/Makefile
@@ -5,6 +5,7 @@ RVV-OBJS-$(CONFIG_AAC_ENCODER) += riscv/aacencdsp_rvv.o
OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_init.o
RV-OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_rvb.o
RVV-OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_rvv.o
+RVVB-OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_rvvb.o
OBJS-$(CONFIG_ALAC_DECODER) += riscv/alacdsp_init.o
RVV-OBJS-$(CONFIG_ALAC_DECODER) += riscv/alacdsp_rvv.o
OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_init.o
diff --git a/libavcodec/riscv/ac3dsp_init.c b/libavcodec/riscv/ac3dsp_init.c
index 8cfa69055a..f66b6cac57 100644
--- a/libavcodec/riscv/ac3dsp_init.c
+++ b/libavcodec/riscv/ac3dsp_init.c
@@ -29,6 +29,7 @@
void ff_ac3_exponent_min_rvb(uint8_t *exp, int, int);
void ff_ac3_exponent_min_rvv(uint8_t *exp, int, int);
void ff_extract_exponents_rvb(uint8_t *exp, int32_t *coef, int nb_coefs);
+void ff_extract_exponents_rvvb(uint8_t *exp, int32_t *coef, int nb_coefs);
void ff_float_to_fixed24_rvv(int32_t *dst, const float *src, size_t len);
void ff_sum_square_butterfly_int32_rvv(int64_t *, const int32_t *,
const int32_t *, int);
@@ -48,6 +49,10 @@ av_cold void ff_ac3dsp_init_riscv(AC3DSPContext *c)
if (flags & AV_CPU_FLAG_RVB_ADDR) {
if (flags & AV_CPU_FLAG_RVB_BASIC)
c->extract_exponents = ff_extract_exponents_rvb;
+# if HAVE_RV_ZVBB
+ if (flags & AV_CPU_FLAG_RV_ZVBB)
+ c->extract_exponents = ff_extract_exponents_rvvb;
+# endif
if (flags & AV_CPU_FLAG_RVV_F32) {
c->float_to_fixed24 = ff_float_to_fixed24_rvv;
c->sum_square_butterfly_float = ff_sum_square_butterfly_float_rvv;
diff --git a/libavcodec/riscv/ac3dsp_rvvb.S b/libavcodec/riscv/ac3dsp_rvvb.S
new file mode 100644
index 0000000000..64766b56be
--- /dev/null
+++ b/libavcodec/riscv/ac3dsp_rvvb.S
@@ -0,0 +1,43 @@
+/*
+ * Copyright © 2023 Rémi Denis-Courmont.
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "config.h"
+#include "libavutil/riscv/asm.S"
+
+func ff_extract_exponents_rvvb, zve32x, zvbb
+1:
+ vsetvli t0, a2, e32, m8, ta, ma
+ vle32.v v8, (a1)
+ sub a2, a2, t0
+ vneg.v v16, v8
+ sh2add a1, t0, a1
+ vmax.vv v8, v8, v16
+ vclz.v v8, v8
+ vsetvli zero, zero, e16, m4, ta, ma
+ vncvt.x.x.w v4, v8
+ vsetvli zero, zero, e8, m2, ta, ma
+ vncvt.x.x.w v2, v4
+ vadd.vi v2, v2, 24 - 32
+ vse8.v v2, (a0)
+ add a0, a0, t0
+ bnez a2, 1b
+
+ ret
+endfunc
--
2.43.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension
2024-05-07 19:12 [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 3/3] lavc/ac3dsp: add R-V Zvbb extract_exponents Rémi Denis-Courmont
@ 2024-05-07 20:34 ` Martin Storsjö
2024-05-08 6:22 ` Rémi Denis-Courmont
2 siblings, 1 reply; 6+ messages in thread
From: Martin Storsjö @ 2024-05-07 20:34 UTC (permalink / raw)
To: FFmpeg development discussions and patches
On Tue, 7 May 2024, Rémi Denis-Courmont wrote:
> ---
> Makefile | 2 +-
> configure | 3 +++
> doc/APIchanges | 3 +++
> ffbuild/arch.mak | 1 +
> libavutil/cpu.h | 1 +
> libavutil/tests/cpu.c | 1 +
> tests/checkasm/checkasm.c | 1 +
> 7 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c
> index d91bfeab5c..10e620963b 100644
> --- a/libavutil/tests/cpu.c
> +++ b/libavutil/tests/cpu.c
> @@ -94,6 +94,7 @@ static const struct {
> { AV_CPU_FLAG_RVV_F32, "zve32f" },
> { AV_CPU_FLAG_RVV_I64, "zve64x" },
> { AV_CPU_FLAG_RVV_F64, "zve64d" },
> + { AV_CPU_FLAG_RV_ZVBB, "zvbb" },
> #endif
> { 0 }
> };
Doesn't this test require you to add this extension to the list in
libavutil/cpu.c as well?
// Martin
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension
2024-05-07 20:34 ` [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Martin Storsjö
@ 2024-05-08 6:22 ` Rémi Denis-Courmont
0 siblings, 0 replies; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-08 6:22 UTC (permalink / raw)
To: FFmpeg development discussions and patches
Le 7 mai 2024 23:34:14 GMT+03:00, "Martin Storsjö" <martin@martin.st> a écrit :
>On Tue, 7 May 2024, Rémi Denis-Courmont wrote:
>
>> ---
>> Makefile | 2 +-
>> configure | 3 +++
>> doc/APIchanges | 3 +++
>> ffbuild/arch.mak | 1 +
>> libavutil/cpu.h | 1 +
>> libavutil/tests/cpu.c | 1 +
>> tests/checkasm/checkasm.c | 1 +
>> 7 files changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c
>> index d91bfeab5c..10e620963b 100644
>> --- a/libavutil/tests/cpu.c
>> +++ b/libavutil/tests/cpu.c
>> @@ -94,6 +94,7 @@ static const struct {
>> { AV_CPU_FLAG_RVV_F32, "zve32f" },
>> { AV_CPU_FLAG_RVV_I64, "zve64x" },
>> { AV_CPU_FLAG_RVV_F64, "zve64d" },
>> + { AV_CPU_FLAG_RV_ZVBB, "zvbb" },
>> #endif
>> { 0 }
>> };
>
>Doesn't this test require you to add this extension to the list in libavutil/cpu.c as well?
TBH, I don't see the point of this stuff. These options look like cargo cult to me.
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [FFmpeg-devel] [PATCHv2 1/3] riscv: add Zvbb vector bit manipulation extension
@ 2024-05-08 16:00 Rémi Denis-Courmont
2024-05-08 16:00 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
0 siblings, 1 reply; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-08 16:00 UTC (permalink / raw)
To: ffmpeg-devel
---
Makefile | 2 +-
configure | 3 +++
doc/APIchanges | 3 +++
ffbuild/arch.mak | 1 +
libavutil/cpu.c | 1 +
libavutil/cpu.h | 1 +
libavutil/tests/cpu.c | 1 +
tests/checkasm/checkasm.c | 1 +
8 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index de727cbe00..4c3af09fec 100644
--- a/Makefile
+++ b/Makefile
@@ -101,7 +101,7 @@ SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \
ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \
MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
- MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS \
+ MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS RVVB-OBJS \
OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS
define RESET
diff --git a/configure b/configure
index beb1fa6d3c..2193905a54 100755
--- a/configure
+++ b/configure
@@ -2222,6 +2222,7 @@ ARCH_EXT_LIST_PPC="
ARCH_EXT_LIST_RISCV="
rv
rvv
+ rv_zvbb
"
ARCH_EXT_LIST_X86="
@@ -2760,6 +2761,7 @@ power8_deps="vsx"
rv_deps="riscv"
rvv_deps="rv"
+rv_zvbb_deps="rvv"
loongson2_deps="mips"
loongson3_deps="mips"
@@ -6384,6 +6386,7 @@ elif enabled riscv; then
enabled rv && check_inline_asm rv '".option arch, +zbb\nrev8 t0, t1"'
enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"'
+ enabled rv_zvbb && check_inline_asm rv_zvbb '".option arch, +zvbb\nvclz.v v0, v8"'
elif enabled x86; then
diff --git a/doc/APIchanges b/doc/APIchanges
index 824beec9d3..238d22c135 100644
--- a/doc/APIchanges
+++ b/doc/APIchanges
@@ -2,6 +2,9 @@ The last version increases of all libraries were on 2024-03-07
API changes, most recent first:
+2024-05-10 - xxxxxxxxx - lavu 59.18.100 - cpu.h
+ Add AV_CPU_FLAG_RV_ZVBB.
+
2024-05-04 - xxxxxxxxxx - lavu 59.17.100 - opt.h
Add AV_OPT_TYPE_UINT and av_opt_eval_uint().
diff --git a/ffbuild/arch.mak b/ffbuild/arch.mak
index 23a3feb090..3fc40e5e5d 100644
--- a/ffbuild/arch.mak
+++ b/ffbuild/arch.mak
@@ -17,6 +17,7 @@ OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes)
OBJS-$(HAVE_RV) += $(RV-OBJS) $(RV-OBJS-yes)
OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
+OBJS-$(HAVE_RV_ZVBB) += $(RVVB-OBJS) $(RVVB-OBJS-yes)
OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes)
diff --git a/libavutil/cpu.c b/libavutil/cpu.c
index d4f947360a..396eeb38d6 100644
--- a/libavutil/cpu.c
+++ b/libavutil/cpu.c
@@ -192,6 +192,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
{ "zve64d", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F64 }, .unit = "flags" },
{ "zba", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_ADDR }, .unit = "flags" },
{ "zbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC }, .unit = "flags" },
+ { "zvbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB }, .unit = "flags" },
#endif
{ NULL },
};
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 8dff341886..cc19828d4b 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -90,6 +90,7 @@
#define AV_CPU_FLAG_RVV_F64 (1 << 6) ///< Vectors of double's
#define AV_CPU_FLAG_RVB_BASIC (1 << 7) ///< Basic bit-manipulations
#define AV_CPU_FLAG_RVB_ADDR (1 << 8) ///< Address bit-manipulations
+#define AV_CPU_FLAG_RV_ZVBB (1 << 9) ///< Vector basic bit-manipulations
/**
* Return the flags which specify extensions supported by the CPU.
diff --git a/libavutil/tests/cpu.c b/libavutil/tests/cpu.c
index d91bfeab5c..10e620963b 100644
--- a/libavutil/tests/cpu.c
+++ b/libavutil/tests/cpu.c
@@ -94,6 +94,7 @@ static const struct {
{ AV_CPU_FLAG_RVV_F32, "zve32f" },
{ AV_CPU_FLAG_RVV_I64, "zve64x" },
{ AV_CPU_FLAG_RVV_F64, "zve64d" },
+ { AV_CPU_FLAG_RV_ZVBB, "zvbb" },
#endif
{ 0 }
};
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index 9be32fc16e..9a05c1f95e 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -282,6 +282,7 @@ static const struct {
{ "RVVf32", "rvv_f32", AV_CPU_FLAG_RVV_F32 },
{ "RVVi64", "rvv_i64", AV_CPU_FLAG_RVV_I64 },
{ "RVVf64", "rvv_f64", AV_CPU_FLAG_RVV_F64 },
+ { "RV_Zvbb", "rv_zvbb", AV_CPU_FLAG_RV_ZVBB },
#elif ARCH_MIPS
{ "MMI", "mmi", AV_CPU_FLAG_MMI },
{ "MSA", "msa", AV_CPU_FLAG_MSA },
--
2.43.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection
2024-05-08 16:00 [FFmpeg-devel] [PATCHv2 " Rémi Denis-Courmont
@ 2024-05-08 16:00 ` Rémi Denis-Courmont
0 siblings, 0 replies; 6+ messages in thread
From: Rémi Denis-Courmont @ 2024-05-08 16:00 UTC (permalink / raw)
To: ffmpeg-devel
This requires Linux kernel version 6.8 or later.
---
libavutil/riscv/cpu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/libavutil/riscv/cpu.c b/libavutil/riscv/cpu.c
index 69d1afe853..3cf4e25bc9 100644
--- a/libavutil/riscv/cpu.c
+++ b/libavutil/riscv/cpu.c
@@ -54,6 +54,10 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVB_ADDR;
if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
ret |= AV_CPU_FLAG_RVB_BASIC;
+#ifdef RISCV_HWPROBE_EXT_ZVBB
+ if (pairs[1].value & RISCV_HWPROBE_EXT_ZVBB)
+ ret |= AV_CPU_FLAG_RV_ZVBB;
+#endif
} else
#endif
#if HAVE_GETAUXVAL
@@ -105,6 +109,9 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVV_F64;
#endif
#endif
+#endif
+#ifdef __riscv_zvbb
+ ret |= AV_CPU_FLAG_RV_ZVBB;
#endif
return ret;
--
2.43.0
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-05-08 16:01 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-05-07 19:12 [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
2024-05-07 19:12 ` [FFmpeg-devel] [PATCH 3/3] lavc/ac3dsp: add R-V Zvbb extract_exponents Rémi Denis-Courmont
2024-05-07 20:34 ` [FFmpeg-devel] [PATCH 1/3] riscv: add Zvbb vector bit manipulation extension Martin Storsjö
2024-05-08 6:22 ` Rémi Denis-Courmont
2024-05-08 16:00 [FFmpeg-devel] [PATCHv2 " Rémi Denis-Courmont
2024-05-08 16:00 ` [FFmpeg-devel] [PATCH 2/3] lavu/riscv: add Zvbb CPU capability detection Rémi Denis-Courmont
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