From: "Martin Storsjö" <martin@martin.st> To: ffmpeg-devel@ffmpeg.org Subject: [FFmpeg-devel] [PATCH v2] riscv: vc1dsp: Don't check vlenb before checking the CPU flags Date: Fri, 15 Dec 2023 17:38:45 +0200 Message-ID: <20231215153845.161544-1-martin@martin.st> (raw) We can't call ff_get_rv_vlenb() if we don't have RVV available at all. Due to the SIGILL signal handler in checkasm catching it, in an unexpected place, this caused checkasm to hang instead of reporting the issue. --- libavcodec/riscv/vc1dsp_init.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/libavcodec/riscv/vc1dsp_init.c b/libavcodec/riscv/vc1dsp_init.c index 0d22d28f4d..e47b644f80 100644 --- a/libavcodec/riscv/vc1dsp_init.c +++ b/libavcodec/riscv/vc1dsp_init.c @@ -35,15 +35,13 @@ av_cold void ff_vc1dsp_init_riscv(VC1DSPContext *dsp) #if HAVE_RVV int flags = av_get_cpu_flags(); - if (ff_get_rv_vlenb() >= 16) { + if (flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >= 16) { + dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv; + dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv; if (flags & AV_CPU_FLAG_RVV_I64) { dsp->vc1_inv_trans_8x8_dc = ff_vc1_inv_trans_8x8_dc_rvv; dsp->vc1_inv_trans_8x4_dc = ff_vc1_inv_trans_8x4_dc_rvv; } - if (flags & AV_CPU_FLAG_RVV_I32) { - dsp->vc1_inv_trans_4x8_dc = ff_vc1_inv_trans_4x8_dc_rvv; - dsp->vc1_inv_trans_4x4_dc = ff_vc1_inv_trans_4x4_dc_rvv; - } } #endif } -- 2.34.1 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
next reply other threads:[~2023-12-15 15:38 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-12-15 15:38 Martin Storsjö [this message] 2023-12-16 8:51 ` Rémi Denis-Courmont 2023-12-16 20:31 ` Martin Storsjö
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