[FFmpeg-devel] [PATCH 1/4] lavu/fixed_dsp: R-V V vector_fmul_add

[FFmpeg-devel] [PATCH 1/4] lavu/fixed_dsp: R-V V vector_fmul_add

[Rémi Denis-Courmont]

vector_fmul_add_fixed_c: 2.2
vector_fmul_add_fixed_rvv_i64: 0.5
---
 libavutil/riscv/fixed_dsp_init.c |  5 +++++
 libavutil/riscv/fixed_dsp_rvv.S  | 21 +++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/libavutil/riscv/fixed_dsp_init.c b/libavutil/riscv/fixed_dsp_init.c
index 409b6d7b55..4b239829f5 100644
--- a/libavutil/riscv/fixed_dsp_init.c
+++ b/libavutil/riscv/fixed_dsp_init.c
@@ -25,6 +25,8 @@
 #include "libavutil/cpu.h"
 #include "libavutil/fixed_dsp.h"
 
+void ff_vector_fmul_add_fixed_rvv(int *dst, const int *src0, const int *src1,
+                                  const int *src2, int len);
 int ff_scalarproduct_fixed_rvv(const int *v1, const int *v2, int len);
 void ff_butterflies_fixed_rvv(int *v1, int *v2, int len);
 
@@ -34,8 +36,11 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp)
     int flags = av_get_cpu_flags();
 
     if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) {
+        fdsp->vector_fmul_add = ff_vector_fmul_add_fixed_rvv;
+
         if (flags & AV_CPU_FLAG_RVV_I64)
             fdsp->scalarproduct_fixed = ff_scalarproduct_fixed_rvv;
+
         fdsp->butterflies_fixed = ff_butterflies_fixed_rvv;
     }
 #endif
diff --git a/libavutil/riscv/fixed_dsp_rvv.S b/libavutil/riscv/fixed_dsp_rvv.S
index 83cad4bde3..1022a401d3 100644
--- a/libavutil/riscv/fixed_dsp_rvv.S
+++ b/libavutil/riscv/fixed_dsp_rvv.S
@@ -20,6 +20,27 @@
 
 #include "asm.S"
 
+
+func ff_vector_fmul_add_fixed_rvv, zve32x
+        csrwi   vxrm, 0
+1:
+        vsetvli t0, a4, e32, m8, ta, ma
+        vle32.v v16, (a1)
+        sub     a4, a4, t0
+        vle32.v v24, (a2)
+        sh2add  a1, t0, a1
+        vsmul.vv v8, v16, v24
+        sh2add  a2, t0, a2
+        vle32.v v0,(a3)
+        sh2add  a3, t0, a3
+        vadd.vv v8, v8, v0
+        vse32.v v8, (a0)
+        sh2add  a0, t0, a0
+        bnez    a4, 1b
+
+        ret
+endfunc
+
 func ff_scalarproduct_fixed_rvv, zve64x
         li      t1, 1 << 30
         vsetvli t0, zero, e64, m8, ta, ma
-- 
2.42.0

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[FFmpeg-devel] [PATCH 2/4] lavu/fixed_dsp: R-V V vector_fmul_reverse

[Rémi Denis-Courmont]

---
 libavutil/riscv/fixed_dsp_init.c |  3 +++
 libavutil/riscv/fixed_dsp_rvv.S  | 24 ++++++++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/libavutil/riscv/fixed_dsp_init.c b/libavutil/riscv/fixed_dsp_init.c
index 4b239829f5..470b35fb63 100644
--- a/libavutil/riscv/fixed_dsp_init.c
+++ b/libavutil/riscv/fixed_dsp_init.c
@@ -25,6 +25,8 @@
 #include "libavutil/cpu.h"
 #include "libavutil/fixed_dsp.h"
 
+void ff_vector_fmul_reverse_fixed_rvv(int *dst, const int *src0,
+                                      const int *src1, int len);
 void ff_vector_fmul_add_fixed_rvv(int *dst, const int *src0, const int *src1,
                                   const int *src2, int len);
 int ff_scalarproduct_fixed_rvv(const int *v1, const int *v2, int len);
@@ -36,6 +38,7 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp)
     int flags = av_get_cpu_flags();
 
     if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) {
+        fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_fixed_rvv;
         fdsp->vector_fmul_add = ff_vector_fmul_add_fixed_rvv;
 
         if (flags & AV_CPU_FLAG_RVV_I64)
diff --git a/libavutil/riscv/fixed_dsp_rvv.S b/libavutil/riscv/fixed_dsp_rvv.S
index 1022a401d3..8a5d1853c5 100644
--- a/libavutil/riscv/fixed_dsp_rvv.S
+++ b/libavutil/riscv/fixed_dsp_rvv.S
@@ -20,6 +20,30 @@
 
 #include "asm.S"
 
+func ff_vector_fmul_reverse_fixed_rvv, zve32x
+        csrwi   vxrm, 0
+        vsetvli t0, zero, e16, m4, ta, ma
+        sh2add  a2, a3, a2
+        vid.v   v0
+        vadd.vi v0, v0, 1
+1:
+        vsetvli t0, a3, e16, m4, ta, ma
+        slli    t1, t0, 2
+        vrsub.vx v4, v0, t0 // v4[i] = [VL-1, VL-2... 1, 0]
+        sub     a2, a2, t1
+        vsetvli zero, zero, e32, m8, ta, ma
+        vle32.v v8, (a2)
+        sub     a3, a3, t0
+        vle32.v v16, (a1)
+        add     a1, a1, t1
+        vrgatherei16.vv v24, v8, v4 // v24 = reverse(v8)
+        vsmul.vv v16, v16, v24
+        vse32.v v16, (a0)
+        add     a0, a0, t1
+        bnez    a3, 1b
+
+        ret
+endfunc
 
 func ff_vector_fmul_add_fixed_rvv, zve32x
         csrwi   vxrm, 0
-- 
2.42.0

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[FFmpeg-devel] [PATCH 3/4] lavu/fixed_dsp: R-V V vector_fmul

[Rémi Denis-Courmont]

vector_fmul_fixed_c: 4.0
vector_fmul_fixed_rvv_i64: 0.5
---
 libavutil/riscv/fixed_dsp_init.c |  3 +++
 libavutil/riscv/fixed_dsp_rvv.S  | 17 +++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/libavutil/riscv/fixed_dsp_init.c b/libavutil/riscv/fixed_dsp_init.c
index 470b35fb63..02883b31d4 100644
--- a/libavutil/riscv/fixed_dsp_init.c
+++ b/libavutil/riscv/fixed_dsp_init.c
@@ -25,6 +25,8 @@
 #include "libavutil/cpu.h"
 #include "libavutil/fixed_dsp.h"
 
+void ff_vector_fmul_fixed_rvv(int *dst, const int *src0, const int *src1,
+                              int len);
 void ff_vector_fmul_reverse_fixed_rvv(int *dst, const int *src0,
                                       const int *src1, int len);
 void ff_vector_fmul_add_fixed_rvv(int *dst, const int *src0, const int *src1,
@@ -38,6 +40,7 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp)
     int flags = av_get_cpu_flags();
 
     if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) {
+        fdsp->vector_fmul = ff_vector_fmul_fixed_rvv;
         fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_fixed_rvv;
         fdsp->vector_fmul_add = ff_vector_fmul_add_fixed_rvv;
 
diff --git a/libavutil/riscv/fixed_dsp_rvv.S b/libavutil/riscv/fixed_dsp_rvv.S
index 8a5d1853c5..d5d538239f 100644
--- a/libavutil/riscv/fixed_dsp_rvv.S
+++ b/libavutil/riscv/fixed_dsp_rvv.S
@@ -20,6 +20,23 @@
 
 #include "asm.S"
 
+func ff_vector_fmul_fixed_rvv, zve32x
+        csrwi   vxrm, 0
+1:
+        vsetvli t0, a3, e32, m4, ta, ma
+        vle32.v v16, (a1)
+        sub     a3, a3, t0
+        vle32.v v24, (a2)
+        sh2add  a1, t0, a1
+        vsmul.vv v8, v16, v24
+        sh2add  a2, t0, a2
+        vse32.v v8, (a0)
+        sh2add  a0, t0, a0
+        bnez    a3, 1b
+
+        ret
+endfunc
+
 func ff_vector_fmul_reverse_fixed_rvv, zve32x
         csrwi   vxrm, 0
         vsetvli t0, zero, e16, m4, ta, ma
-- 
2.42.0

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[FFmpeg-devel] [PATCH 4/4] lavu/fixed_dsp: R-V V vector_fmul_window

[Rémi Denis-Courmont]

---
 libavutil/riscv/fixed_dsp_init.c |  6 +++++
 libavutil/riscv/fixed_dsp_rvv.S  | 44 ++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/libavutil/riscv/fixed_dsp_init.c b/libavutil/riscv/fixed_dsp_init.c
index 02883b31d4..6469b45374 100644
--- a/libavutil/riscv/fixed_dsp_init.c
+++ b/libavutil/riscv/fixed_dsp_init.c
@@ -25,6 +25,9 @@
 #include "libavutil/cpu.h"
 #include "libavutil/fixed_dsp.h"
 
+void ff_vector_fmul_window_fixed_rvv(int32_t *dst, const int32_t *src0,
+                                     const int32_t *src1, const int32_t *win,
+                                     int len);
 void ff_vector_fmul_fixed_rvv(int *dst, const int *src0, const int *src1,
                               int len);
 void ff_vector_fmul_reverse_fixed_rvv(int *dst, const int *src0,
@@ -40,6 +43,9 @@ av_cold void ff_fixed_dsp_init_riscv(AVFixedDSPContext *fdsp)
     int flags = av_get_cpu_flags();
 
     if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) {
+        if (flags & AV_CPU_FLAG_RVV_I64)
+            fdsp->vector_fmul_window = ff_vector_fmul_window_fixed_rvv;
+
         fdsp->vector_fmul = ff_vector_fmul_fixed_rvv;
         fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_fixed_rvv;
         fdsp->vector_fmul_add = ff_vector_fmul_add_fixed_rvv;
diff --git a/libavutil/riscv/fixed_dsp_rvv.S b/libavutil/riscv/fixed_dsp_rvv.S
index d5d538239f..5b666016a0 100644
--- a/libavutil/riscv/fixed_dsp_rvv.S
+++ b/libavutil/riscv/fixed_dsp_rvv.S
@@ -20,6 +20,50 @@
 
 #include "asm.S"
 
+func ff_vector_fmul_window_fixed_rvv, zve64x
+        csrwi   vxrm, 0
+        vsetvli t0, zero, e16, m1, ta, ma
+        sh2add  a2, a4, a2
+        vid.v   v0
+        sh3add  t3, a4, a3
+        vadd.vi v0, v0, 1
+        sh3add  t0, a4, a0
+1:
+        vsetvli t2, a4, e16, m1, ta, ma
+        slli    t4, t2, 2
+        vrsub.vx v2, v0, t2
+        sub     t3, t3, t4
+        vsetvli zero, zero, e32, m2, ta, ma
+        sub     a2, a2, t4
+        vle32.v v8, (t3)
+        sub     t0, t0, t4
+        vle32.v v4, (a2)
+        sub     a4, a4, t2
+        vrgatherei16.vv v28, v8, v2
+        vle32.v v16, (a1)
+        add     a1, a1, t4
+        vrgatherei16.vv v20, v4, v2
+        vle32.v v24, (a3)
+        add     a3, a3, t4
+        vwmul.vv v12, v16, v28
+        vwmul.vv v8, v16, v24
+        // vwnmsac.vv does _not_ exist so multiply & subtract separately
+        vwmul.vv v4, v20, v24
+        vwmacc.vv v8, v20, v28
+        vsetvli zero, zero, e64, m4, ta, ma
+        vsub.vv v12, v12, v4
+        vsetvli zero, zero, e32, m2, ta, ma
+        vnclip.wi v16, v8, 31
+        vnclip.wi v20, v12, 31
+        vrgatherei16.vv v8, v16, v2
+        vse32.v v20, (a0)
+        add     a0, a0, t4
+        vse32.v v8, (t0)
+        bnez    a4, 1b
+
+        ret
+endfunc
+
 func ff_vector_fmul_fixed_rvv, zve32x
         csrwi   vxrm, 0
 1:
-- 
2.42.0

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Re: [FFmpeg-devel] [PATCH 4/4] lavu/fixed_dsp: R-V V vector_fmul_window

[Rémi Denis-Courmont]

Le keskiviikkona 4. lokakuuta 2023, 22.51.10 EEST Rémi Denis-Courmont a écrit 
:
> +        vwmul.vv v12, v16, v28
> +        vwmul.vv v8, v16, v24
> +        // vwnmsac.vv does _not_ exist so multiply & subtract separately
> +        vwmul.vv v4, v20, v24
> +        vwmacc.vv v8, v20, v28

Retaining 3 whole double-width multiply vectors is really hurting here. This 
would be a lot smoother with just the top-halves (vsmul.vv), but then we need 
to round each multiplication. Of course the final results would differ slightly 
then, and I am not sure what that entails for the audio codecs (nor would I 
know how to update the x86 code).

N.B.: Don't ask for benchmarks, this can't run on v0.7.1 proto-RVV hardware.

-- 
雷米‧德尼-库尔蒙
http://www.remlab.net/



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