From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ffbox0-bg.mplayerhq.hu (ffbox0-bg.ffmpeg.org [79.124.17.100]) by master.gitmailbox.com (Postfix) with ESMTP id D2A3A461DD for ; Tue, 9 May 2023 09:51:04 +0000 (UTC) Received: from [127.0.1.1] (localhost [127.0.0.1]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTP id 4D20C68C1E2; Tue, 9 May 2023 12:50:58 +0300 (EEST) Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) by ffbox0-bg.mplayerhq.hu (Postfix) with ESMTPS id EB07F68C1AC for ; Tue, 9 May 2023 12:50:51 +0300 (EEST) Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-643912bca6fso4464779b3a.0 for ; Tue, 09 May 2023 02:50:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1683625850; x=1686217850; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=ZYH4+RKVzmZvt7Wt2+pf9hPQjmEy9FS4oZ3x4SN8eAk=; b=jTjlOB0oRs2jnSFt5z97CMc9/q5yO1uQsqtYSJhWnMT/6lDf0HsNaDXV4jBNrnU1+z bM3PGfnt2MpZ3w1D3c0/dSSxFZxCTcQzcYP5zl3ZixeUFZ2mCSeDkWWtc2+GsIlhjmQd rzT1WPW0xSXGvLHgS2OniotIPqO11umcCN1P7H0fU4GtzhKRuQm7OClTpyp1qJBVvso7 x6uvLZtlluskcayO2yBk4+froTVt0YxnqZbpoVmYbiyvJ7DNbiDUSYUzHGEpz9BGmylU al/T0cb4AU8y/lNToWTZ3HCBWOq5JblVa+1GImSYO4FwVegjZFChYxswviVzmxZEB31E XvaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683625850; x=1686217850; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=ZYH4+RKVzmZvt7Wt2+pf9hPQjmEy9FS4oZ3x4SN8eAk=; b=XrnI5NtI7WWg/FgplCfpbKXvfQHclqymhgtAXVK30qnxSwKPRly66wVtGgrIWfDX5a jlLhrtmTQkr2f/mWtsRyGs0407SxzAHyl8QsChCX9UDgWYXk4q225E7Z/NIHDu08zxqC wn6DLhHSKviDRf5KBFaiQiuC1iPZhDVoa09Ej9u2aSg29oN1WTK5xtOyb6tQCWZxZpix wdIleR1BuhZYqOIuNRBIJgvB+hCFrIFGGGWSB5qo3/Z9+4K8o4KLDOOcFOqNMSvq32bG ibtJERVaTP0STtU9WF6nH5M2LWdqZ48ZfXk7otlz3u9YBsbQumrV1dtMK0epyJP+I17G +icw== X-Gm-Message-State: AC+VfDyoW1cS6VXw4bcH7QtM34jgFxWUzLukAVJDfSBomjriPhinovrx Q3T5LA4R17Vy+4izrDjs6YUPbmLfLmsKkZZd1PR2A3D2e7vODuNeiXX/QGGyJ+Y5sbTQVoS5r9Q qWSFiDCKJxe+v+9g2uHYWCQRnSMattr7zUMWTXuwkF/bNgwG71oTaV1ldDM7n0TZdPw45J1nJbF P5CGzg X-Google-Smtp-Source: ACHHUZ5xm/ggrwB0l7ZPBJ225EgUnsl0dToNG2cpaSk722ts8aYN74I9hADgY12RmFnSUJHjxtCzAA== X-Received: by 2002:a05:6a00:2d99:b0:63b:5496:7b04 with SMTP id fb25-20020a056a002d9900b0063b54967b04mr17904302pfb.9.1683625849792; Tue, 09 May 2023 02:50:49 -0700 (PDT) Received: from arnie-ThinkPad-T480s.localdomain (61-230-13-76.dynamic-ip.hinet.net. [61.230.13.76]) by smtp.gmail.com with ESMTPSA id x10-20020aa784ca000000b0064394d63458sm465875pfn.78.2023.05.09.02.50.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 May 2023 02:50:49 -0700 (PDT) From: Arnie Chang To: ffmpeg-devel@ffmpeg.org Date: Tue, 9 May 2023 17:50:26 +0800 Message-Id: <20230509095030.25506-2-arnie.chang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230509095030.25506-1-arnie.chang@sifive.com> References: <20230509095030.25506-1-arnie.chang@sifive.com> Subject: [FFmpeg-devel] [PATCH 1/5] configure: Add detection of RISC-V vector intrinsic support X-BeenThere: ffmpeg-devel@ffmpeg.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: FFmpeg development discussions and patches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: FFmpeg development discussions and patches Cc: Arnie Chang MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: ffmpeg-devel-bounces@ffmpeg.org Sender: "ffmpeg-devel" Archived-At: List-Archive: List-Post: Check whether the toolchain has support for RISC-V intrinsic and then update the flag, HAVE_INTRINSICS_RVV, in the config.h Signed-off-by: Arnie Chang --- configure | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configure b/configure index bb7be67676..883bee1e34 100755 --- a/configure +++ b/configure @@ -2210,6 +2210,7 @@ HEADERS_LIST=" INTRINSICS_LIST=" intrinsics_neon + intrinsics_rvv " MATH_FUNCS=" @@ -6119,6 +6120,7 @@ elif enabled ppc; then elif enabled riscv; then enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"' + enabled rvv && check_cc intrinsics_rvv riscv_vector.h "int vl = __riscv_vsetvl_e8m1(8)" elif enabled x86; then -- 2.17.1 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".