From: "Rémi Denis-Courmont" <remi@remlab.net> To: ffmpeg-devel@ffmpeg.org Subject: [FFmpeg-devel] [PATCH 3/4] lavc/opusdsp: RISC-V V (256-bit) postfilter Date: Wed, 5 Oct 2022 19:12:55 +0300 Message-ID: <20221005161256.27612-3-remi@remlab.net> (raw) In-Reply-To: <12083658.O9o76ZdvQC@basile.remlab.net> This adds a variant of the postfilter for use with 256-bit vectors. As a single vector is then large enough to perform the scalar product, the group multipler is reduced to just one at run-time. The different vector type is passed via register. Unfortunately, there is no VSETIVL instruction, so the constant vector size (5) also needs to be passed via a register. --- libavcodec/riscv/opusdsp_init.c | 4 ++++ libavcodec/riscv/opusdsp_rvv.S | 16 ++++++++++++---- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/libavcodec/riscv/opusdsp_init.c b/libavcodec/riscv/opusdsp_init.c index f1d2c871e3..e6f9505f77 100644 --- a/libavcodec/riscv/opusdsp_init.c +++ b/libavcodec/riscv/opusdsp_init.c @@ -26,6 +26,7 @@ #include "libavcodec/opusdsp.h" void ff_opus_postfilter_rvv_128(float *data, int period, float *g, int len); +void ff_opus_postfilter_rvv_256(float *data, int period, float *g, int len); av_cold void ff_opus_dsp_init_riscv(OpusDSP *d) { @@ -37,6 +38,9 @@ av_cold void ff_opus_dsp_init_riscv(OpusDSP *d) case 16: d->postfilter = ff_opus_postfilter_rvv_128; break; + case 32: + d->postfilter = ff_opus_postfilter_rvv_256; + break; } #endif } diff --git a/libavcodec/riscv/opusdsp_rvv.S b/libavcodec/riscv/opusdsp_rvv.S index 79b46696cd..243c9a5e52 100644 --- a/libavcodec/riscv/opusdsp_rvv.S +++ b/libavcodec/riscv/opusdsp_rvv.S @@ -21,30 +21,38 @@ #include "libavutil/riscv/asm.S" func ff_opus_postfilter_rvv_128, zve32f + lvtypei a5, e32, m2, ta, ma + j 1f +endfunc + +func ff_opus_postfilter_rvv_256, zve32f + lvtypei a5, e32, m1, ta, ma +1: + li a4, 5 addi a1, a1, 2 slli a1, a1, 2 lw t1, 4(a2) vsetivli zero, 3, e32, m1, ta, ma vle32.v v24, (a2) sub a1, a0, a1 // a1 = &x4 = &data[-(period + 2)] - vsetivli zero, 5, e32, m2, ta, ma + vsetvl zero, a4, a5 vslide1up.vx v8, v24, t1 lw t2, 8(a2) vle32.v v16, (a1) vslide1up.vx v24, v8, t2 // v24 = { g[2], g[1], g[0], g[1], g[2] } 2: - vsetvli t0, a3, e32, m2, ta, ma + vsetvl t0, a3, a5 vle32.v v0, (a0) sub a3, a3, t0 3: - vsetivli zero, 5, e32, m2, ta, ma + vsetvl zero, a4, a5 lw t2, 20(a1) vfmul.vv v8, v24, v16 addi a0, a0, 4 vslide1down.vx v16, v16, t2 addi a1, a1, 4 vfredusum.vs v0, v8, v0 - vsetvli zero, t0, e32, m2, ta, ma + vsetvl zero, t0, a5 vmv.x.s t1, v0 addi t0, t0, -1 vslide1down.vx v0, v0, zero -- 2.37.2 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
next prev parent reply other threads:[~2022-10-05 16:13 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-10-05 16:12 [FFmpeg-devel] [PATCHv2 0/4] RISC-V V Opus postfilter Rémi Denis-Courmont 2022-10-05 16:12 ` [FFmpeg-devel] [PATCH 1/4] lavc/opusdsp: RISC-V V (128-bit) postfilter Rémi Denis-Courmont 2022-10-05 16:12 ` [FFmpeg-devel] [PATCH 2/4] lavu/riscv: helper macro for VTYPE encoding Rémi Denis-Courmont 2022-10-05 16:12 ` Rémi Denis-Courmont [this message] 2022-10-05 16:12 ` [FFmpeg-devel] [PATCH 4/4] lavc/opusdsp: RISC-V V (512-bit) postfilter Rémi Denis-Courmont
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