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From: remi@remlab.net
To: ffmpeg-devel@ffmpeg.org
Subject: [FFmpeg-devel] [PATCH 4/4] lavc/bswapdsp: RISC-V V bswap16_buf
Date: Sun,  2 Oct 2022 14:55:01 +0300
Message-ID: <20221002115501.17996-4-remi@remlab.net> (raw)
In-Reply-To: <2650188.mvXUDI8C0e@basile.remlab.net>

From: Rémi Denis-Courmont <remi@remlab.net>

---
 libavcodec/riscv/bswapdsp_init.c |  5 ++++-
 libavcodec/riscv/bswapdsp_rvv.S  | 17 +++++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/libavcodec/riscv/bswapdsp_init.c b/libavcodec/riscv/bswapdsp_init.c
index c17b6b75bb..abe84ec1f7 100644
--- a/libavcodec/riscv/bswapdsp_init.c
+++ b/libavcodec/riscv/bswapdsp_init.c
@@ -27,6 +27,7 @@
 
 void ff_bswap32_buf_rvb(uint32_t *dst, const uint32_t *src, int len);
 void ff_bswap32_buf_rvv(uint32_t *dst, const uint32_t *src, int len);
+void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len);
 
 av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
 {
@@ -37,7 +38,9 @@ av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
         c->bswap_buf = ff_bswap32_buf_rvb;
 #endif
 #if HAVE_RVV
-    if (cpu_flags & AV_CPU_FLAG_RVV_I32)
+    if (cpu_flags & AV_CPU_FLAG_RVV_I32) {
         c->bswap_buf = ff_bswap32_buf_rvv;
+        c->bswap16_buf = ff_bswap16_buf_rvv;
+    }
 #endif
 }
diff --git a/libavcodec/riscv/bswapdsp_rvv.S b/libavcodec/riscv/bswapdsp_rvv.S
index 7ea747b3ce..ef2999c1be 100644
--- a/libavcodec/riscv/bswapdsp_rvv.S
+++ b/libavcodec/riscv/bswapdsp_rvv.S
@@ -43,3 +43,20 @@ func ff_bswap32_buf_rvv, zve32x
 
         ret
 endfunc
+
+func ff_bswap16_buf_rvv, zve32x
+        li      t2, 2
+        addi    t1, a0, 1
+1:
+        vsetvli    t0, a2, e8, m1, ta, ma
+        vlseg2e8.v v8, (a1)
+        sub        a2, a2, t0
+        sh1add     a1, t0, a1
+        vsse8.v    v8, (t1), t2
+        sh1add     t1, t0, t1
+        vsse8.v    v9, (a0), t2
+        sh1add     a0, t0, a0
+        bnez       a2, 1b
+
+        ret
+endfunc
-- 
2.37.2

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  parent reply	other threads:[~2022-10-02 11:55 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-02 11:54 [FFmpeg-devel] [PATCH 0/4] RISC-V initial bswapdsp Rémi Denis-Courmont
2022-10-02 11:54 ` [FFmpeg-devel] [PATCH 1/4] lavu/riscv: CPU flag for the Zbb extension remi
2022-10-02 11:54 ` [FFmpeg-devel] [PATCH 2/4] lavc/bswapdsp: RISC-V B bswap_buf remi
2022-10-02 11:55 ` [FFmpeg-devel] [PATCH 3/4] lavc/bswapdsp: RISC-V V bswap_buf remi
2022-10-02 11:55 ` remi [this message]
2022-10-05  6:36   ` [FFmpeg-devel] [PATCH 4/4] lavc/bswapdsp: RISC-V V bswap16_buf Lynne

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