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From: remi@remlab.net
To: ffmpeg-devel@ffmpeg.org
Subject: [FFmpeg-devel] [PATCH 3/4] lavc/bswapdsp: RISC-V V bswap_buf
Date: Sun,  2 Oct 2022 14:55:00 +0300
Message-ID: <20221002115501.17996-3-remi@remlab.net> (raw)
In-Reply-To: <2650188.mvXUDI8C0e@basile.remlab.net>

From: Rémi Denis-Courmont <remi@remlab.net>

---
 libavcodec/riscv/Makefile        |  1 +
 libavcodec/riscv/bswapdsp_init.c |  7 ++++-
 libavcodec/riscv/bswapdsp_rvv.S  | 45 ++++++++++++++++++++++++++++++++
 3 files changed, 52 insertions(+), 1 deletion(-)
 create mode 100644 libavcodec/riscv/bswapdsp_rvv.S

diff --git a/libavcodec/riscv/Makefile b/libavcodec/riscv/Makefile
index db4384bca7..b94901ce8d 100644
--- a/libavcodec/riscv/Makefile
+++ b/libavcodec/riscv/Makefile
@@ -5,6 +5,7 @@ OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_init.o \
 RVV-OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_rvv.o
 OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_init.o \
                            riscv/bswapdsp_rvb.o
+RVV-OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_rvv.o
 OBJS-$(CONFIG_FMTCONVERT) += riscv/fmtconvert_init.o
 RVV-OBJS-$(CONFIG_FMTCONVERT) += riscv/fmtconvert_rvv.o
 OBJS-$(CONFIG_IDCTDSP) += riscv/idctdsp_init.o
diff --git a/libavcodec/riscv/bswapdsp_init.c b/libavcodec/riscv/bswapdsp_init.c
index 701dbeaaa6..c17b6b75bb 100644
--- a/libavcodec/riscv/bswapdsp_init.c
+++ b/libavcodec/riscv/bswapdsp_init.c
@@ -26,13 +26,18 @@
 #include "libavcodec/bswapdsp.h"
 
 void ff_bswap32_buf_rvb(uint32_t *dst, const uint32_t *src, int len);
+void ff_bswap32_buf_rvv(uint32_t *dst, const uint32_t *src, int len);
 
 av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
 {
-#if (__riscv_xlen >= 64)
     int cpu_flags = av_get_cpu_flags();
 
+#if (__riscv_xlen >= 64)
     if (cpu_flags & AV_CPU_FLAG_RVB_BASIC)
         c->bswap_buf = ff_bswap32_buf_rvb;
 #endif
+#if HAVE_RVV
+    if (cpu_flags & AV_CPU_FLAG_RVV_I32)
+        c->bswap_buf = ff_bswap32_buf_rvv;
+#endif
 }
diff --git a/libavcodec/riscv/bswapdsp_rvv.S b/libavcodec/riscv/bswapdsp_rvv.S
new file mode 100644
index 0000000000..7ea747b3ce
--- /dev/null
+++ b/libavcodec/riscv/bswapdsp_rvv.S
@@ -0,0 +1,45 @@
+/*
+ * Copyright © 2022 Rémi Denis-Courmont.
+ *
+ * This file is part of FFmpeg.
+ *
+ * FFmpeg is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * FFmpeg is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with FFmpeg; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "config.h"
+#include "libavutil/riscv/asm.S"
+
+func ff_bswap32_buf_rvv, zve32x
+        li      t4, 4
+        addi    t1, a0, 1
+        addi    t2, a0, 2
+        addi    t3, a0, 3
+1:
+        vsetvli    t0, a2, e8, m1, ta, ma
+        vlseg4e8.v v8, (a1)
+        sub        a2, a2, t0
+        sh2add     a1, t0, a1
+        vsse8.v    v8, (t3), t4
+        sh2add     t3, t0, t3
+        vsse8.v    v9, (t2), t4
+        sh2add     t2, t0, t2
+        vsse8.v    v10, (t1), t4
+        sh2add     t1, t0, t1
+        vsse8.v    v11, (a0), t4
+        sh2add     a0, t0, a0
+        bnez       a2, 1b
+
+        ret
+endfunc
-- 
2.37.2

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  parent reply	other threads:[~2022-10-02 11:55 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-02 11:54 [FFmpeg-devel] [PATCH 0/4] RISC-V initial bswapdsp Rémi Denis-Courmont
2022-10-02 11:54 ` [FFmpeg-devel] [PATCH 1/4] lavu/riscv: CPU flag for the Zbb extension remi
2022-10-02 11:54 ` [FFmpeg-devel] [PATCH 2/4] lavc/bswapdsp: RISC-V B bswap_buf remi
2022-10-02 11:55 ` remi [this message]
2022-10-02 11:55 ` [FFmpeg-devel] [PATCH 4/4] lavc/bswapdsp: RISC-V V bswap16_buf remi
2022-10-05  6:36   ` Lynne

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