From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Subject: [FFmpeg-devel] [PATCH 06/18] configure: probe RISC-V Vector extension Date: Mon, 12 Sep 2022 18:53:21 +0300 Message-ID: <20220912155333.59843-6-remi@remlab.net> (raw) In-Reply-To: <2652141.mvXUDI8C0e@basile.remlab.net> From: Rémi Denis-Courmont <remi@remlab.net> --- Makefile | 2 +- configure | 15 +++++++++++++++ ffbuild/arch.mak | 2 ++ 3 files changed, 18 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 61f79e27ae..1fb742f390 100644 --- a/Makefile +++ b/Makefile @@ -91,7 +91,7 @@ ffbuild/.config: $(CONFIGURABLE_COMPONENTS) SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \ HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS \ ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \ - ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \ + ALTIVEC-OBJS VSX-OBJS RVV-OBJS MMX-OBJS X86ASM-OBJS \ MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \ MMI-OBJS LSX-OBJS LASX-OBJS OBJS SLIBOBJS SHLIBOBJS \ STLIBOBJS HOSTOBJS TESTOBJS diff --git a/configure b/configure index b7dc1d8656..c5f20cc323 100755 --- a/configure +++ b/configure @@ -462,6 +462,7 @@ Optimization options (experts only): --disable-mmi disable Loongson MMI optimizations --disable-lsx disable Loongson LSX optimizations --disable-lasx disable Loongson LASX optimizations + --disable-rvv disable RISC-V Vector optimizations --disable-fast-unaligned consider unaligned accesses slow Developer options (useful when working on FFmpeg itself): @@ -2126,6 +2127,10 @@ ARCH_EXT_LIST_PPC=" vsx " +ARCH_EXT_LIST_RISCV=" + rvv +" + ARCH_EXT_LIST_X86=" $ARCH_EXT_LIST_X86_SIMD cpunop @@ -2135,6 +2140,7 @@ ARCH_EXT_LIST_X86=" ARCH_EXT_LIST=" $ARCH_EXT_LIST_ARM $ARCH_EXT_LIST_PPC + $ARCH_EXT_LIST_RISCV $ARCH_EXT_LIST_X86 $ARCH_EXT_LIST_MIPS $ARCH_EXT_LIST_LOONGSON @@ -2642,6 +2648,8 @@ ppc4xx_deps="ppc" vsx_deps="altivec" power8_deps="vsx" +rvv_deps="riscv" + loongson2_deps="mips" loongson3_deps="mips" mmi_deps_any="loongson2 loongson3" @@ -6110,6 +6118,10 @@ elif enabled ppc; then check_cpp_condition power8 "altivec.h" "defined(_ARCH_PWR8)" fi +elif enabled riscv; then + + enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"' + elif enabled x86; then check_builtin rdtsc intrin.h "__rdtsc()" @@ -7596,6 +7608,9 @@ if enabled loongarch; then echo "LSX enabled ${lsx-no}" echo "LASX enabled ${lasx-no}" fi +if enabled riscv; then + echo "RISC-V Vector enabled ${riscv-no}" +fi echo "debug symbols ${debug-no}" echo "strip symbols ${stripping-no}" echo "optimize for size ${small-no}" diff --git a/ffbuild/arch.mak b/ffbuild/arch.mak index 997e31e85e..39d76ee152 100644 --- a/ffbuild/arch.mak +++ b/ffbuild/arch.mak @@ -15,5 +15,7 @@ OBJS-$(HAVE_LASX) += $(LASX-OBJS) $(LASX-OBJS-yes) OBJS-$(HAVE_ALTIVEC) += $(ALTIVEC-OBJS) $(ALTIVEC-OBJS-yes) OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes) +OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes) + OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes) OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes) -- 2.37.2 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
next prev parent reply other threads:[~2022-09-12 15:54 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <2652141.mvXUDI8C0e@basile.remlab.net> 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 01/18] doc: reference the RISC-V specification remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 02/18] lavu/riscv: AV_READ_TIME cycle counter remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 03/18] configure/riscv: detect fast CLZ remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 04/18] lavu/riscv: byte-swap operations remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 05/18] lavu/riscv: add <intmath.h> optimisations remi 2022-09-14 9:28 ` Rémi Denis-Courmont 2022-09-12 15:53 ` remi [this message] 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 07/18] lavu/riscv: initial common header for assembler macros remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 08/18] lavu/riscv: add CPU flags for the RISC-V Vector extension remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 09/18] checkasm: register the RISC-V V subsets remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 10/18] lavu/riscv: float vector-scalar multiplication with RVV remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 11/18] lavu/riscv: float vector-vector " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 12/18] lavu/riscv: float vector multiply-accumulate " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 13/18] lavu/riscv: float vector multiplication-addition " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 14/18] lavu/riscv: float vector sum-and-difference " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 15/18] lavu/riscv: float reversed vector multiplication " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 16/18] lavu/riscv: float vector windowed overlap/add " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 17/18] lavu/riscv: float vector dot product " remi 2022-09-12 15:53 ` [FFmpeg-devel] [PATCH 18/18] lavu/riscv: fixed vector sum-and-difference " remi 2022-09-09 15:48 [FFmpeg-devel] [PATCH 06/18] configure: probe RISC-V Vector extension remi
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