From: remi@remlab.net To: ffmpeg-devel@ffmpeg.org Subject: [FFmpeg-devel] [PATCH 09/12] lavu/riscv: float reversed vector multiplication with RVV Date: Tue, 6 Sep 2022 21:43:59 +0300 Message-ID: <20220906184402.119826-9-remi@remlab.net> (raw) In-Reply-To: <5753736.MhkbZ0Pkbq@basile.remlab.net> From: Rémi Denis-Courmont <remi@remlab.net> --- libavutil/riscv/float_dsp_init.c | 3 +++ libavutil/riscv/float_dsp_rvv.S | 22 ++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/libavutil/riscv/float_dsp_init.c b/libavutil/riscv/float_dsp_init.c index 2165394585..1183460181 100644 --- a/libavutil/riscv/float_dsp_init.c +++ b/libavutil/riscv/float_dsp_init.c @@ -30,6 +30,8 @@ void ff_vector_fmul_scalar_rvv(float *dst, const float *src, float mul, int len); void ff_vector_fmul_add_rvv(float *dst, const float *src0, const float *src1, const float *src2, int len); +void ff_vector_fmul_reverse_rvv(float *dst, const float *src0, + const float *src1, int len); void ff_butterflies_float_rvv(float *v1, float *v2, int len); void ff_vector_dmul_rvv(double *dst, const double *src0, const double *src1, @@ -48,6 +50,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp) fdsp->vector_fmac_scalar = ff_vector_fmac_scalar_rvv; fdsp->vector_fmul_scalar = ff_vector_fmul_scalar_rvv; fdsp->vector_fmul_add = ff_vector_fmul_add_rvv; + fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_rvv; fdsp->butterflies_float = ff_butterflies_float_rvv; if (flags & AV_CPU_FLAG_ZVE64D) { diff --git a/libavutil/riscv/float_dsp_rvv.S b/libavutil/riscv/float_dsp_rvv.S index 1c3b08b94f..b376392294 100644 --- a/libavutil/riscv/float_dsp_rvv.S +++ b/libavutil/riscv/float_dsp_rvv.S @@ -92,6 +92,28 @@ func ff_vector_fmul_add_rvv, zve32f ret endfunc +// (a0) = (a1) * reverse(a2) [0..a3-1] +func ff_vector_fmul_reverse_rvv, zve32f + add t3, a3, -1 + li t2, -4 // byte stride + slli t3, t3, 2 + add a2, a2, t3 + +1: vsetvli t0, a3, e32, m8, ta, ma + slli t1, t0, 2 + vle32.v v16, (a1) + add a1, a1, t1 + vlse32.v v24, (a2), t2 + sub a2, a2, t1 + vfmul.vv v16, v16, v24 + sub a3, a3, t0 + vse32.v v16, (a0) + add a0, a0, t1 + bnez a3, 1b + + ret +endfunc + // (a0) = (a0) + (a1), (a1) = (a0) - (a1) [0..a2-1] func ff_butterflies_float_rvv, zve32f 1: vsetvli t0, a2, e32, m8, ta, ma -- 2.37.2 _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-request@ffmpeg.org with subject "unsubscribe".
next prev parent reply other threads:[~2022-09-06 18:45 UTC|newest] Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-06 18:43 [FFmpeg-devel] [PATCHv3 0/12] RISC-V Vector functions for lavu float&fixed DSP Rémi Denis-Courmont 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 01/12] lavu/riscv: add CPU flags for the RISC-V Vector extension remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 02/12] checkasm: register the RISC-V V subsets remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 03/12] lavu/riscv: initial common header for assembler macros remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 04/12] lavu/riscv: float vector-scalar multiplication with RVV remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 05/12] lavu/riscv: float vector-vector " remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 06/12] lavu/riscv: float vector multiply-accumulate " remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 07/12] lavu/riscv: float vector multiplication-addition " remi 2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 08/12] lavu/riscv: float vector sum-and-difference " remi 2022-09-06 18:43 ` remi [this message] 2022-09-06 18:44 ` [FFmpeg-devel] [PATCH 10/12] lavu/riscv: float vector windowed overlap/add " remi 2022-09-06 18:44 ` [FFmpeg-devel] [PATCH 11/12] lavu/riscv: float vector dot product " remi 2022-09-06 18:44 ` [FFmpeg-devel] [PATCH 12/12] lavu/riscv: fixed vector sum-and-difference " remi
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