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From: remi@remlab.net
To: ffmpeg-devel@ffmpeg.org
Subject: [FFmpeg-devel] [PATCH 11/12] lavu/riscv: float vector dot product with RVV
Date: Tue,  6 Sep 2022 21:44:01 +0300
Message-ID: <20220906184402.119826-11-remi@remlab.net> (raw)
In-Reply-To: <5753736.MhkbZ0Pkbq@basile.remlab.net>

From: Rémi Denis-Courmont <remi@remlab.net>

---
 libavutil/riscv/float_dsp_init.c |  2 ++
 libavutil/riscv/float_dsp_rvv.S  | 21 +++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/libavutil/riscv/float_dsp_init.c b/libavutil/riscv/float_dsp_init.c
index 887706d899..7c2fc10e99 100644
--- a/libavutil/riscv/float_dsp_init.c
+++ b/libavutil/riscv/float_dsp_init.c
@@ -35,6 +35,7 @@ void ff_vector_fmul_add_rvv(float *dst, const float *src0, const float *src1,
 void ff_vector_fmul_reverse_rvv(float *dst, const float *src0,
                                  const float *src1, int len);
 void ff_butterflies_float_rvv(float *v1, float *v2, int len);
+float ff_scalarproduct_float_rvv(const float *v1, const float *v2, int len);
 
 void ff_vector_dmul_rvv(double *dst, const double *src0, const double *src1,
                          int len);
@@ -55,6 +56,7 @@ av_cold void ff_float_dsp_init_riscv(AVFloatDSPContext *fdsp)
         fdsp->vector_fmul_add = ff_vector_fmul_add_rvv;
         fdsp->vector_fmul_reverse = ff_vector_fmul_reverse_rvv;
         fdsp->butterflies_float = ff_butterflies_float_rvv;
+        fdsp->scalarproduct_float = ff_scalarproduct_float_rvv;
 
         if (flags & AV_CPU_FLAG_ZVE64D) {
             fdsp->vector_dmul = ff_vector_dmul_rvv;
diff --git a/libavutil/riscv/float_dsp_rvv.S b/libavutil/riscv/float_dsp_rvv.S
index 65daaa2d27..81bd0e510a 100644
--- a/libavutil/riscv/float_dsp_rvv.S
+++ b/libavutil/riscv/float_dsp_rvv.S
@@ -167,6 +167,27 @@ func ff_butterflies_float_rvv, zve32f
         ret
 endfunc
 
+// a0 = (a0).(a1) [0..a2-1]
+func ff_scalarproduct_float_rvv, zve32f
+        vsetvli      zero, zero, e32, m8, ta, ma
+        vmv.s.x      v8, zero
+
+1:      vsetvli      t0, a2, e32, m8, ta, ma
+        slli         t1, t0, 2
+        vle32.v      v16, (a0)
+        add          a0, a0, t1
+        vle32.v      v24, (a1)
+        add          a1, a1, t1
+        vfmul.vv     v16, v16, v24
+        sub          a2, a2, t0
+        vfredusum.vs v8, v16, v8
+        bnez         a2, 1b
+
+        vfmv.f.s fa0, v8
+NOHWF   fmv.x.w  a0, fa0
+        ret
+endfunc
+
 // (a0) = (a1) * (a2) [0..a3-1]
 func ff_vector_dmul_rvv, zve64d
 1:      vsetvli  t0, a3, e64, m8, ta, ma
-- 
2.37.2

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  parent reply	other threads:[~2022-09-06 18:45 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-06 18:43 [FFmpeg-devel] [PATCHv3 0/12] RISC-V Vector functions for lavu float&fixed DSP Rémi Denis-Courmont
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 01/12] lavu/riscv: add CPU flags for the RISC-V Vector extension remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 02/12] checkasm: register the RISC-V V subsets remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 03/12] lavu/riscv: initial common header for assembler macros remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 04/12] lavu/riscv: float vector-scalar multiplication with RVV remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 05/12] lavu/riscv: float vector-vector " remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 06/12] lavu/riscv: float vector multiply-accumulate " remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 07/12] lavu/riscv: float vector multiplication-addition " remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 08/12] lavu/riscv: float vector sum-and-difference " remi
2022-09-06 18:43 ` [FFmpeg-devel] [PATCH 09/12] lavu/riscv: float reversed vector multiplication " remi
2022-09-06 18:44 ` [FFmpeg-devel] [PATCH 10/12] lavu/riscv: float vector windowed overlap/add " remi
2022-09-06 18:44 ` remi [this message]
2022-09-06 18:44 ` [FFmpeg-devel] [PATCH 12/12] lavu/riscv: fixed vector sum-and-difference " remi

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