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From: jianhua.wu-at-intel.com@ffmpeg.org
To: ffmpeg-devel@ffmpeg.org
Cc: Wu Jianhua <jianhua.wu@intel.com>
Subject: [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl
Date: Fri, 11 Mar 2022 15:52:12 +0800
Message-ID: <20220311075213.49925-4-jianhua.wu@intel.com> (raw)
In-Reply-To: <20220311075213.49925-1-jianhua.wu@intel.com>

From: Wu Jianhua <jianhua.wu@intel.com>

ff_hevc_put_hevc_qpel_h32_8_sse4       14122151
ff_hevc_put_hevc_qpel_h32_8_avx2        9337675
ff_hevc_put_hevc_qpel_h32_8_avx512icl   6424654

Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
 libavcodec/x86/hevc_mc.asm    | 17 ++++++++++++++---
 libavcodec/x86/hevcdsp.h      |  1 +
 libavcodec/x86/hevcdsp_init.c |  1 +
 3 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index ff59ae3509..fc3faac376 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -91,6 +91,7 @@ QPEL_TABLE  4, 1, b, avx512icl_h
 QPEL_TABLE  8, 1, b, avx512icl_h
 QPEL_TABLE  8, 1, d, avx512icl_v
 QPEL_TABLE 16, 1, b, avx512icl_h
+QPEL_TABLE 32, 1, b, avx512icl_h
 
 pb_qpel_shuffle_index: db  0,  1,  2,  3
                        db  1,  2,  3,  4
@@ -1736,12 +1737,17 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
 ; required: m0-m5
 ; %1: dst register index
 ; %2: name for src
-%macro QPEL_H_LOAD_COMPUTE 2
+; %3: optional offset
+%macro QPEL_H_LOAD_COMPUTE 2-3
+%assign %%offset 0
+%if %0 == 3
+%assign %%offset %3
+%endif
     pxor            m%1, m%1
 %if mmsize == 64
-    movu            ym4, [%2q - 3]
+    movu            ym4, [%2q + %%offset - 3]
 %else
-    movu            xm4, [%2q - 3]
+    movu            xm4, [%2q + %%offset - 3]
 %endif
     vpermb           m5, m2, m4
     vpermb           m4, m3, m4
@@ -1760,6 +1766,10 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
     movq             [dstq], xm6
 %else
     vpmovdw          [dstq], m6
+%endif
+%if %1 == 32
+    QPEL_H_LOAD_COMPUTE   7, src, 16
+    vpmovdw     [dstq + 32], m7
 %endif
     LOOP_END            dst, src, srcstride
     RET
@@ -1837,6 +1847,7 @@ HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
 
 INIT_ZMM avx512icl
 HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
+HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8
 
 %endif
 %endif
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 51ffdc9628..8d3c3cc75f 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -236,6 +236,7 @@ WEIGHTING_PROTOTYPES(12, sse4);
 void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
 void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
 void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
+void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
 void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
 
 ///////////////////////////////////////////////////////////////////////////////
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index 58b91459ed..ce5902c693 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -882,6 +882,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
             c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl;
             c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
             c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
+            c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl;
             c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
         }
     } else if (bit_depth == 10) {
-- 
2.17.1

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  parent reply	other threads:[~2022-03-11  7:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-11  7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
2022-03-11  7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
2022-03-11  7:52 ` [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl jianhua.wu-at-intel.com
2022-03-11  7:52 ` jianhua.wu-at-intel.com [this message]
2022-03-11  7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 14:51   ` Henrik Gramner
2022-03-17  8:53     ` Wu, Jianhua

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