From: jianhua.wu-at-intel.com@ffmpeg.org
To: ffmpeg-devel@ffmpeg.org
Cc: Wu Jianhua <jianhua.wu@intel.com>
Subject: [FFmpeg-devel] [PATCH v2 3/5] avcodec/x86/hevc_mc: add qpel_h4_8_avx512icl
Date: Fri, 11 Mar 2022 15:52:11 +0800
Message-ID: <20220311075213.49925-3-jianhua.wu@intel.com> (raw)
In-Reply-To: <20220311075213.49925-1-jianhua.wu@intel.com>
From: Wu Jianhua <jianhua.wu@intel.com>
ff_hevc_put_hevc_qpel_h4_8_sse4 993694
ff_hevc_put_hevc_qpel_h4_8_avx512icl 686647
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
---
libavcodec/x86/hevc_mc.asm | 9 +++++++++
libavcodec/x86/hevcdsp.h | 1 +
libavcodec/x86/hevcdsp_init.c | 1 +
3 files changed, 11 insertions(+)
diff --git a/libavcodec/x86/hevc_mc.asm b/libavcodec/x86/hevc_mc.asm
index 4e39cdd7fe..ff59ae3509 100644
--- a/libavcodec/x86/hevc_mc.asm
+++ b/libavcodec/x86/hevc_mc.asm
@@ -87,6 +87,7 @@ QPEL_TABLE 12, 4, w, sse4
QPEL_TABLE 8,16, b, avx2
QPEL_TABLE 10, 8, w, avx2
+QPEL_TABLE 4, 1, b, avx512icl_h
QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h
@@ -1754,7 +1755,12 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
QPEL_LOAD_SHUF 2, 3
.loop:
QPEL_H_LOAD_COMPUTE 6, src
+%if %1 == 4
+ vpmovdw xm6, m6
+ movq [dstq], xm6
+%else
vpmovdw [dstq], m6
+%endif
LOOP_END dst, src, srcstride
RET
%endmacro
@@ -1822,6 +1828,9 @@ cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 7, 27, dst, src, srcstride, height, mx, m
%if ARCH_X86_64
%if HAVE_AVX512ICL_EXTERNAL
+INIT_XMM avx512icl
+HEVC_PUT_HEVC_QPEL_AVX512ICL 4, 8
+
INIT_YMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 8, 8
HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
diff --git a/libavcodec/x86/hevcdsp.h b/libavcodec/x86/hevcdsp.h
index 6e3fc01ad0..51ffdc9628 100644
--- a/libavcodec/x86/hevcdsp.h
+++ b/libavcodec/x86/hevcdsp.h
@@ -233,6 +233,7 @@ WEIGHTING_PROTOTYPES(8, sse4);
WEIGHTING_PROTOTYPES(10, sse4);
WEIGHTING_PROTOTYPES(12, sse4);
+void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
diff --git a/libavcodec/x86/hevcdsp_init.c b/libavcodec/x86/hevcdsp_init.c
index a73c2e2bd9..58b91459ed 100644
--- a/libavcodec/x86/hevcdsp_init.c
+++ b/libavcodec/x86/hevcdsp_init.c
@@ -879,6 +879,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->add_residual[3] = ff_hevc_add_residual_32_8_avx2;
}
if (EXTERNAL_AVX512ICL(cpu_flags) && ARCH_X86_64) {
+ c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl;
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
--
2.17.1
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next prev parent reply other threads:[~2022-03-11 7:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-11 7:52 [FFmpeg-devel] [PATCH v2 1/5] avcodec/x86/hevc_mc: add qpel_h8_8_avx512icl and qpel_hv8_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 2/5] avcodec/x86/hevc_mc: add qpel_h16_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` jianhua.wu-at-intel.com [this message]
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 4/5] avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 7:52 ` [FFmpeg-devel] [PATCH v2 5/5] avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl jianhua.wu-at-intel.com
2022-03-11 14:51 ` Henrik Gramner
2022-03-17 8:53 ` Wu, Jianhua
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