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From: "Rémi Denis-Courmont" <remi@remlab.net>
To: ffmpeg-devel@ffmpeg.org
Subject: Re: [FFmpeg-devel] [PATCH v4] libavcodec/riscv:add RVV optimized idct_32x32_8 for HEVC
Date: Sat, 24 May 2025 19:18:46 +0300
Message-ID: <2001553.PYKUYFuaPT@basile.remlab.net> (raw)
In-Reply-To: <20250520075806.138222-1-daichengrong@iscas.ac.cn>

Le tiistaina 20. toukokuuta 2025, 10.58.06 Itä-Euroopan kesäaika 
daichengrong@iscas.ac.cn a écrit :
> From: daichengrong <daichengrong@iscas.ac.cn>
> 
> Since there are no comments for v2 and v3, we have continued to optimize
> according to the comments of v1. We spilled the slide to memory to help
> improve performance,and optimized the extraction of elements from vector
> registers.

You still seem to be flip-flopping values in X registers. You may need to go 
easier on macros to get a better view of the actual generated code.

Also it seems that this uses half-vectors a lot. I am not sure if this can be 
avoided, but typically that leads to very poor performance.

Also you're resetting `vl` with its current value, which can hurt performance 
depending on the implementation. If you don't need to change `vl`, then use 
`zero`.

Lastly, you seem to be changing vtype when it's not actually needed, e.g.:

vsetvli zero, 4, e16, mf2...
...
vsetvli zero, 4, e32, mf1...
vse32.v ...




-- 
德尼-库尔蒙‧雷米
Hagalund ny stad, f.d. Finska republik Nylands



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  reply	other threads:[~2025-05-24 16:18 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-20  7:58 daichengrong
2025-05-24 16:18 ` Rémi Denis-Courmont [this message]
2025-05-30  7:40 ` [FFmpeg-devel] [PATCH v5] " daichengrong
2025-06-02 20:13   ` Rémi Denis-Courmont
2025-06-06  9:26   ` [FFmpeg-devel] [PATCH v6] libavcodec/riscv: add " daichengrong

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