[FFmpeg-devel] [PR] tools: Make aarch64 asm indenter lowercase a few more details (PR #21419)

["Martin Storsjö via ffmpeg-devel" <ffmpeg-devel@ffmpeg.org>]

PR #21419 opened by Martin Storsjö (mstorsjo)
URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/21419
Patch URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/21419.patch

This ensures consistent formatting. Also add an option for enforcing lowercase register names, which isn't done by default (as it has too many false positives with code comments).

Fix a couple misindented lines in files that normally are excepted from the indent checkers.


From 1aea80d4353a1d3fa1dca917892414c7f9effdab Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
Date: Fri, 9 Jan 2026 13:50:05 +0200
Subject: [PATCH 1/2] aarch64: Fix indentation of a few instructions

This file is excempt from the indent checker script, as there
are a few other bits in it that the script wants to reformat
into slightly worse form, or which might not warrant being
reformatted.

But these instructions should indeed be indented this way.
---
 libavcodec/aarch64/h26x/qpel_neon.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/libavcodec/aarch64/h26x/qpel_neon.S b/libavcodec/aarch64/h26x/qpel_neon.S
index f5aa266ab5..7901fedaf3 100644
--- a/libavcodec/aarch64/h26x/qpel_neon.S
+++ b/libavcodec/aarch64/h26x/qpel_neon.S
@@ -1511,7 +1511,7 @@ function ff_hevc_put_hevc_qpel_uni_v4_8_neon, export=1
 .endm
 1:      calc_all
 .purgem calc
-2: ret
+2:      ret
 endfunc
 
 function ff_hevc_put_hevc_qpel_uni_v6_8_neon, export=1
@@ -1540,7 +1540,7 @@ function ff_hevc_put_hevc_qpel_uni_v6_8_neon, export=1
 .endm
 1:      calc_all
 .purgem calc
-2: ret
+2:      ret
 endfunc
 
 function ff_hevc_put_hevc_qpel_uni_v8_8_neon, export=1
@@ -1567,7 +1567,7 @@ function ff_hevc_put_hevc_qpel_uni_v8_8_neon, export=1
 .endm
 1:      calc_all
 .purgem calc
-2: ret
+2:      ret
 endfunc
 
 function ff_hevc_put_hevc_qpel_uni_v12_8_neon, export=1
-- 
2.49.1


From 8dbab4a19e50bd956e834d8cd36e3e2dc7fb0a74 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
Date: Fri, 9 Jan 2026 13:55:01 +0200
Subject: [PATCH 2/2] tools: Lowercase more SVE/SME specific patterns in
 aarch64 assembly

Also add an option for trying to lowercase all register names;
it's not enabled by default as it has many false positives,
in particular in loop filter code (with code comments mentioning
variables like P0 and Q0).
---
 tools/indent_arm_assembly.pl | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/tools/indent_arm_assembly.pl b/tools/indent_arm_assembly.pl
index 359c2bcf4f..82c9770ca3 100755
--- a/tools/indent_arm_assembly.pl
+++ b/tools/indent_arm_assembly.pl
@@ -44,6 +44,7 @@ my $indent_operands = 0;
 my $instr_indent = 8;
 my $operand_indent = 24;
 my $match_indent = 0;
+my $lowercase_registers = 0;
 my $file;
 my $outfile;
 
@@ -58,6 +59,8 @@ while (@ARGV) {
         $operand_indent = shift;
     } elsif ($opt eq "-match-indent") {
         $match_indent = 1;
+    } elsif ($opt eq "-lowercase-registers") {
+        $lowercase_registers = 1;
     } else {
         if (!$file) {
             $file = $opt;
@@ -219,10 +222,19 @@ while (<$in>) {
             $operand_space = spaces($size);
         }
 
+        if ($lowercase_registers) {
+            # Lowercase register names. Not enabled by default, as this has
+            # got many false matches in code comments.
+            $rest =~ s/\b([XWVQDSHBZP][0-9]+)\b/lc($1)/ge;
+        }
         # Lowercase the aarch64 vector layout description, .8B -> .8b
         $rest =~ s/(\.[84216]*[BHSD])/lc($1)/ge;
         # Lowercase modifiers like "uxtw" or "lsl"
         $rest =~ s/([SU]XT[BWH]|[LA]S[LR])/lc($1)/ge;
+        # Lowercase SVE/SME modifiers like "/Z" or "/M"
+        $rest =~ s,(/[ZM])\b,lc($1),ge;
+        # Lowercase SVE/SME vector lengths
+        $rest =~ s/\b(VL[0-9]+)\b/lc($1)/ge;
 
         # Reassemble the line
         if ($rest eq "") {
-- 
2.49.1

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